User Module Datasheet:Incremental ADC Datasheet ADCINC V 1.20 (CY8C29xxx, CY8C24x94, CY8C23x33, CY7C64215, CY8CLED04/08/16, CY8CLED0xD, CY8CLED0xG, CY8CTST120, CY8CTMG120, CY8CTMA120, CY8C28x45, CY8C28x43, CY8C28x52, CY8CPLC20, CY8CLED16P01, CY8C27/24/22xxx, CY8CLED08)
Last Updated: 11/07/2012
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Version: 1.20
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Features and Overview
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6 to 14-bit resolution
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Optional synchronous 8-bit PWM output
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Optional differential Input
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Signed or unsigned data format
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Sample rate up to 15.6 ksps (6-bit resolution)
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Input range defined by internal and external reference options
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Internal or external clock
Note: If this user module is used with the 29K family, it consumes an extra 6 mA. As an alternative, use the ADCINCVR user module.
The ADCINC is a differential or single input ADC that returns a 6 to 14 bit result. The maximum DataClock frequency is 8 MHz, but 2 MHz is the maximum frequency recommended for improved linearity. This ADC may only be placed one time, due to its implementation which uses the hardware decimator rather than a digital block. This is the most resource efficient ADC. A 2nd order modulator may be implemented with an additional switch-capacitor block, allowing better linearity with an 8 MHz DataClock.
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Spec No: 001-13251;
Sunset Owner: DHA;
Secondary Owner: GDK;
Sunset Date: 06/06/11
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