User Module Datasheet: CapSense® Sigma-Delta Plus ADC Datasheet CSDADC V 1.40 (CY8C24x94, CY8CLED0xD, CY8CLED0xG, CY8CLED04)
Last Updated: 10/22/2012
|
|
|
Version: 1.40
|
Features and Overview
-
Allows scanning CapSense sensors and measuring input voltages without using separate loadable configurations
-
Uses a SincN filter fully implemented in hardware to reduce CPU overhead and antialias requirements
-
Supports a configuration that uses no digital blocks
-
ADC features:
-
Sigma-delta ADC with second order modulator
-
Data in unsigned or signed 2’s complement formats
-
Dynamically changed resolution to 10,12 and 14 bits
-
Maximum sample rates of 31250 sps at 10 bit resolution, 7812 sps at 14-bit resolution
-
Input range defined by internal and external reference options
-
Built in Programmable Gain Amplifier with configurable gain and reference settings.
-
CapSense features:
-
Based on the robust CSD method
-
Second order modulator provides superior SNR performance
-
Scans 1 to 46 capacitive sensors
-
Sensing possible with up to a 25 mm glass overlay
-
For more, see pdf
The CSDADC provides capacitance sensing using the switched capacitor technique with a sigma-delta modulator to convert the sensing switched capacitor current to digital code.
|
这些文档仅供参考。赛普拉斯、赛普拉斯管理层、雇员及分销商对翻译错误不承担任何责任。当您在设计开发过程中使用这些文档时，我们强烈建议您参照英文版本。
これらの文献はあくまでもご参考のためのみに日本語翻訳されています。誤訳によるトラブルが発生した場合、Cypress Semiconductor Corp. 全ての子会社、関連会社、役員、従業員、販売代理店は一切の責任を負いかねます。
最新の英語版オリジナル文献を必ずご参照いただくことをお勧め致します。
Translated documents are for reference only. We recommend that you refer to the English-language version of a document if you are engaged in development of a design.
Spec No: 001-45879;
Sunset Owner: ANBA;
Secondary Owner: JONC;
Sunset Date: 07/26/11
|
|