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AN49081 - Requirements for Input Clock to West Bridge® Devices

Last Updated: 08/14/2012
Version: *A

AN49081 addresses the requirements for the input clock to West Bridge® devices that includes Antioch™, Astoria™, and TX3LP18. The conversion of phase noise specifications into equivalent RMS jitter is also discussed.

This document addresses the input clock requirements for three devices in the West Bridge® family of products: Antioch, Astoria, and TX3LP18. The computation of equivalent RMS jitter from phase noise characteristics is also discussed.


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    File Title Language File Size Last Updated
      AN49081.pdf English 118 KB 10/21/2011
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Spec No: 001-49081; Sunset Owner: PRVE; Secondary Owner: HBM; Sunset Date: 08/21/11

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