72-Mbit (2M x 36) Pipelined Sync SRAM
Features
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Supports bus operation up to 200 MHz
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Available speed grades are 200 and 167 MHz
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Registered inputs and outputs for pipelined operation
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3.3 V core power supply
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2.5 V/3.3 V I/O operation
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Fast clock-to-output times
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Provide high performance 3-1-1-1 access rate
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User selectable burst counter supporting Intel® Pentium® interleaved or linear burst sequences
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For more, see pdf
Functional Description
The CY7C1480V33 SRAM integrates 2 M × 36 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK).
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