Cypress Perform

Home > Documentation > Datasheets

CY2292: Three PLL General Purpose EPROM Programmable Clock Generator

Last Updated: 12/26/2012
Version: *I



Three PLL General Purpose EPROM Programmable Clock Generator

Features

  • Three integrated phase locked loops (PLLs)
  • Erasable programmable read only memory (EPROM) programmability
  • Factory programmable (CY2292) or field programmable (CY2292F) device options
  • Low-skew, low-jitter, high accuracy outputs
  • Power management options (shutdown, OE, suspend)
  • Frequency select option
  • Smooth slewing on CPUCLK
  • Configurable 3.3 V or 5 V operation
  • 16-pin small-outline integrated circuit (SOIC) package (CY2292F also in TSSOP)

Operation

The CY2292 is a third-generation family of clock generators. The CY2292 is upwardly compatible with the industry standard ICD2023 and ICD2028 and continues their tradition by providing a high level of customizable features to meet the diverse clock generation needs of modern motherboards and other synchronous systems.


这些文档仅供参考。赛普拉斯、赛普拉斯管理层、雇员及分销商对翻译错误不承担任何责任。当您在设计开发过程中使用这些文档时,我们强烈建议您参照英文版本。

これらの文献はあくまでもご参考のためのみに日本語翻訳されています。誤訳によるトラブルが発生した場合、Cypress Semiconductor Corp. 全ての子会社、関連会社、役員、従業員、販売代理店は一切の責任を負いかねます。 最新の英語版オリジナル文献を必ずご参照いただくことをお勧め致します。




Related Files

    File Title Language File Size Last Updated
      CY2292.pdf English 569 KB 12/26/2012
    Need help? Ask a question and find answers in the Cypress Developer Community Forums.

    Low/intermittent bandwidth users tip: Firefox and Chrome browsers will allow downloads to be resumed if your connection is lost during download.


Spec No: 38-07449; Sunset Owner: TSAI; Secondary Owner: GOPA; Sunset Date: 06/06/11

Rate Datasheet

Related Pages

Related Parts