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CY29948: 2.5 V or 3.3 V, 200-MHz, 1:12 Clock Distribution Buffer

Last Updated: 01/16/2013
Version: *G


2.5 V or 3.3 V, 200 MHz, 1:12 Clock Distribution Buffer

Features

  • 2.5V or 3.3V operation
  • 200-MHz clock support
  • LVPECL or LVCMOS/LVTTL clock input
  • LVCMOS-/LVTTL-compatible inputs
  • 12 clock outputs: drive up to 24 clock lines
  • Synchronous Output Enable
  • Output three-state control
  • 150 ps typical output-to-output skew
  • Pin compatible with MPC948, MPC948L, MPC9448
  • Available in Commercial and Industrial temp. range
  • 32-pin TQFP package
     

Description

The CY29948 is a low-voltage 200-MHz clock distribution buffer with the capability to select either a differential LVPECL or a LVCMOS/LVTTL compatible input clock. The two clock sources can be used to provide for a test clock as well as the primary system clock. All other control inputs are LVCMOS/LVTTL compatible.


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Related Files

    File Title Language File Size Last Updated
      CY29948.pdf English 383 KB 01/16/2013
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Spec No: 38-07288; Sunset Owner: BASH; Secondary Owner: AJU; Sunset Date: 06/14/11

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