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CY2303: Phase-Aligned Clock Multiplier

Last Updated: 07/30/2012
Version: *E


Phase-Aligned Clock Multiplier

Features

  • 3-Multiplier configuration (1x, 2x, 4x ref)
  • 10 MHz to 166.67 MHz operating range (reference input from 10 MHz to 41.67 MHz)
  • Phase alignment
  • 80 ps typical period jitter
  • Output enable pin
  • 3.3 V operation
  • 5 V tolerant input
  • 8-pin 150-mil small-outline integrated circuit (SOIC) package
  • Commercial temperature range
     

Functional Description

The CY2303 is a 3 output 3.3 V phase-aligned system clock designed to distribute high-speed clocks in PC, workstation, datacom, telecom, and other high-performance applications.

The part allows user to obtain 1x, 2x, and 4x REFIN output frequencies on respective output pins.


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Related Files

    File Title Language File Size Last Updated
      CY2303.pdf English 344 KB 10/11/2010
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Spec No: 38-07249; Sunset Owner: TSAI; Secondary Owner: GOPA; Sunset Date: 06/14/11

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Spec No: 38-07249; Sunset Owner: TSAI; Secondary Owner: GOPA; Sunset Date: 06/14/11