Cypress Perform

Home > Documentation > Datasheets

CY7C1059DV33: 8-Mbit (1M × 8) Static RAM

Last Updated: 07/30/2012
Version: *H


8-Mbit (1M x 8) Static RAM

Features

  • High speed
    • tAA = 10 ns
  • Low active power
    • ICC = 110 mA at 10 ns
  • Low CMOS standby power
    • ISB2 = 20 mA
  • 2.0V data retention
  • Automatic power down when deselected
  • TTL-compatible inputs and outputs
  • For more, see pdf

Functional Description

The CY7C1059DV33 is a high performance CMOS Static RAM organized as 1M words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. To write to the device, take Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight IO pins (IO0 through IO7) is then written into the location specified on the address pins (A0 through A19).


这些文档仅供参考。赛普拉斯、赛普拉斯管理层、雇员及分销商对翻译错误不承担任何责任。当您在设计开发过程中使用这些文档时,我们强烈建议您参照英文版本。

これらの文献はあくまでもご参考のためのみに日本語翻訳されています。誤訳によるトラブルが発生した場合、Cypress Semiconductor Corp. 全ての子会社、関連会社、役員、従業員、販売代理店は一切の責任を負いかねます。 最新の英語版オリジナル文献を必ずご参照いただくことをお勧め致します。




Related Files

    File Title Language File Size Last Updated
      CY7C1059DV33.pdf English 362 KB 09/22/2011
    Need help? Ask a question and find answers in the Cypress Developer Community Forums.

    Low/intermittent bandwidth users tip: Firefox and Chrome browsers will allow downloads to be resumed if your connection is lost during download.


Spec No: 001-00061; Sunset Owner: NIKM; Secondary Owner: SNU; Sunset Date: 06/06/11

Rate Datasheet

Related Pages

Related Parts