8-Mbit (512K x 16) Static RAM
Features
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Temperature ranges
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High speed
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Low active power
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Low CMOS standby power
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2.0V data retention
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Automatic power down when deselected
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TTL-compatible inputs and outputs
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Easy memory expansion with CE and OE features
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Available in Pb-free 48-ball fine ball grid array (FBGA) and 44-pin thin small outline package (TSOP) II packages
Functional Description
The CY7C1051DV33 is a high performance CMOS Static RAM organized as 512K words by 16 bits.
To write to the device, take Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte LOW Enable (BLE) is LOW, then data from IO pins (IO0–IO7), is written into the location specified on the address pins (A0–A18). If Byte HIGH Enable (BHE) is LOW, then data from IO pins (IO8–IO15) is written into the location specified on the address pins (A0–A18).
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