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CY7C185: 64-Kbit (8 K × 8) Static RAM

Last Updated: 07/30/2012
Version: *E


64-Kbit (8K x 8) Static RAM

Features

  • High speed
    • 15 ns
  • Fast tDOE
  • Low active power
    • 715 mW
  • Low standby power
    • 85 mW
  • CMOS for optimum speed/power
  • Easy memory expansion with CE1, CE2 and OE features
  • TTL-compatible inputs and outputs
  • Automatic power down when deselected
  • Available in non Pb-free 28-pin (300-Mil) Molded SOJ, 28-pin (300-Mil) Molded SOIC and Pb-free 28-pin (300-Mil) Molded DIP

Functional Description

The CY7C185 is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE1), an active HIGH chip enable (CE2), and active LOW output enable (OE) and tri-state drivers. This device has an automatic power down feature (CE1 or CE2), reducing the power consumption by 70% when deselected. The CY7C185 is in a standard 300-mil-wide DIP, SOJ, or SOIC package.      More...


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Related Files

    File Title Language File Size Last Updated
      CY7C185.pdf English 389 KB 04/28/2011
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Spec No: 38-05043; Sunset Owner: HMLA; Secondary Owner: SNU; Sunset Date: 09/15/11

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