AN6081 - Interfacing 90-nm Cypress Asynchronous SRAMs in Legacy Systems
Last Updated: 12/19/2012
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Version: *F
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Click here to download Application Note (PDF File)
Cypress's 90nm technology Asynchronous SRAMs have best-in-class specifications in speed and power making them an ideal choice as memories in a wide variety of applications today.
The application note below discusses how they are suited for present generation processors and controllers while Cypress' older generation SRAMs (250nm and 350nm) are a good fit for interfacing with legacy processors and controllers. The 90nm technology 5V devices are pin compatible with their older technology counterparts. The reason for Cypress continuing to support end users with older generations SRAMs is because of their increased VOH levels that ensure compliance with CMOS VIH levels of legacy processors and microcontrollers. While both generations of SRAM's have the same industry standard VOH spec, the difference in actual VOH levels enable Cypress to support processors of older and present generations, reiterating Cypress' commitment as the #1 supplier in the industry.
Please see the illustrations and the application note below for details.
Processor receiving data from SRAM on a read operation:
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Related Application Notes:
Domain Tags: Interface, Async, Volatile Memories, Voltage, Single supply
Market Segment Tags: LAN Switches, Public Infrastructure - Switching & Transport, Servers, Digital Still Camera
Related Knowledge Base: Interface, SRAM, Voltage Levels, Async, TTL
Spec No: 001-16634;
Sunset Owner: NILE;
Secondary Owner: AJU;
Sunset Date: 10/06/11
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