CY7C68014A - 56PVXC - Cypress Semiconductor

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CY7C68014A-56PVXC Status: In Production		Alert me about changes to this product

Datasheet

CY7C68014A-56PVXC

Development Kit	CY3684
CPU Core	Enhanced 8051
Automotive Qualified	N
Application	USB High-Speed Peripherals
I/O Options	8/16-bit Databus, DMA, GPIO, I2C, UART
Data Transfers	Bulk, Interrupt, Isochronous
Memory Architecture	RAM
Memory Size (KB)	16
Min. Operating Voltage (V)	3.00
Max. Operating Voltage (V)	3.60
Min. Operating Temp. (°C)	0
Max. Operating Temp. (°C)	70
No. of I/Os	24

Pricing & Inventory Availability

1-10 unit Price*	11-100 unit Price*	101-1000 unit Price*	1001 + unit Price*
$11.69	$9.73	$8.61	$8.54

Availability	Quantity	Ships In	Order Now
In Stock	30	24-48 hours

* Prices are shown in United States dollars and are for budgetary use only.

Packaging/Ordering

Package	SSOP
No. of Pins	56
Package Dimensions	725 L X 0 H X 295 W (Mils)
Package Weight	744.68 (mgs)
Package Cross Section Drawing	Download
Package Carrier	TUBE
Package Carrier Drawing / Orientation	Drawing, Package Orientation
Standard Pack Quantity	52
Minimum Order Quantity (MOQ)	52
Order Increment	52
Estimated Lead Time (days)	42
HTS Code	8542.31.0000
ECCN	3A991
ECCN Suball	(A.3)

Quality and RoHS

Moisture Sensitivity Level (MSL)	3
Peak Reflow Temp. (°C)	260 (Cypress Reflow Profile)
RoHS Compliant	Y Print RoHS Certificate of Compliance
PB Free	Y
Lead/Ball Finish	Ni/Pd/Au
Marking	Cypress Marking Format
Package Material Declaration 056L-SSOP 001-03010 Last Update: 07/16/2012
IPC 1752 Material Declaration IPC-1752-2_V1.1_SSOP 56_CML_NIPDAU_ GREEN MC Last Update: 07/04/2012 IPC-1752-2_V1.1_SSOP 56_OSET_NIPDAU Last Update: 07/04/2012 SSOP 56 - 001-80408 Last Update: 08/29/2012
RoHS Analysis Certificates (CoA) PACKAGE ROHS ANALYSIS REPORT - SSOP (SP48,56) QSOP (SQ20,24) USING MOLD COMPOUND KEG3000DA, ADHESIVE QMI509, NIPDAU - JCET CHINA ASSEMBLY Last Update: 07/03/2012 PACKAGE ROHS ANALYSIS REPORT - SSOP (SP 20,28,48,56) SOIC (SZ08,14,16) USING MOLD COMPOUND CEL9220HF, ADHESIVE 4900G, NIPDAU - OSE TAIWAN ASSEMBLY Last Update: 07/04/2012 PACKAGE ROHS ANALYSIS REPORT - SSOP (SP20,28,48,56) QSOP (SQ20,24) SOIC (SZ18,24) TSOP (ZT32) USING MOLD COMPOUND KEG3000DA, ADHESIVE QMI509, NIPDAU - CML ASSEMBLY Last Update: 07/04/2012
RoHS Analysis Certificates (CoA) for Direct Materials Please click here
Device Qualification Reports FIT/MTBF, ESD (HBM/CDM) and Latch-up data available in the Device Qualification Report. Please click here.

Technical Documents

Application Notes (29)
AN65209 - Getting Started with FX2LP™ Last Update: 07/05/2013
AN61345 - Designing with EZ-USB FX2LP™ Slave FIFO Interface using FPGA Last Update: 07/05/2013
AN4067 - Endpoint FIFO Architecture of EZ-USB FX1/FX2LP™ Last Update: 02/05/2013
AN60081 - Interfacing Samsung MuxOneNand to Cypress USB Controllers Last Update: 02/04/2013
AN76348 - Differences in Implementation of EZ-USB® FX2LP™ and EZ-USB FX3 Applications Last Update: 27/03/2013
AN14558 - Implementing I/O Bit-Bang SPI Interface with EZ-USB FX2LP™ Last Update: 19/03/2013
AN78446 - Interrupt Handling in EZ-USB® FX2LP™ Last Update: 08/02/2013
Code/Memory Banking Using EZ-USB® - AN58170 Last Update: 17/01/2013
AN50963 - EZ-USB® FX1™/FX2LP™ Boot Options Last Update: 27/12/2012
AN58009 - Serial (UART) Port Debugging of FX1/FX2LP Firmware Last Update: 26/12/2012
AN70983 - EZ-USB FX2LP™ Bulk Transfer Application in C# Using SuiteUSB C# Library (CyUSB.dll) Last Update: 19/12/2012
AN70486 - EZ-USB® FX2LP™ Host Application in VC++ 2008 Using Suite USB Library (CyUSB.dll) Last Update: 19/12/2012
Interfacing SRAM with FX2LP over GPIF - AN57322 Last Update: 28/11/2012
AN74505 - EZ-USB® FX2LP™ - Developing USB Application on MAC OS X using LIBUSB Last Update: 05/11/2012
AN66806 - Getting Started with EZ-USB® FX2LP™ GPIF Last Update: 16/10/2012
AN73609 - EZ-USB® FX2LP™/ FX3™ Developing Bulk-Loop Example on Linux Last Update: 15/10/2012
AN4078 - Migrating From EZ-USB® FX2™ to EZ-USB FX2LP™ Last Update: 11/09/2012
AN63787 - EZ-USB® FX2LP™ GPIF and Slave FIFO Configuration Examples Using 8-bit Asynchronous Interface Last Update: 28/08/2012
EZ-USB® FX2LPTM/FX2LP18 56-Ball BGA PCB Layout Guidelines Last Update: 22/08/2012
AN15456 - Guide to Successful EZ-USB(R) FX2LP(TM) and EZ-USB FX1(TM) Hardware Design and Debug Last Update: 10/08/2012
Configuring a Xilinx Spartan-3E FPGA Over USB Using EZ-USB FX2LP™ - AN63620 Last Update: 24/07/2012
AN4053 - Streaming Data Through Isochronous or Bulk Endpoints on EZ-USB® FX2™ and EZ-USB FX2LP™ Last Update: 24/07/2012
AN6077 - Implementing an 8-Bit Asynchronous Interface with FX2LP™ Last Update: 24/07/2012
Monitoring the EZ-USB FX2LP(TM) VBUS - AN15813 Last Update: 23/07/2012
SPI Implementation Using Serial Mode-0 of EZ-USB FX2LP™ - AN67442 Last Update: 23/07/2012
Vendor Command Design Guide for the FX2LP - AN45471 Last Update: 29/05/2012
AN6076 - Differences Between EZ-USB FX2LP(TM) and MoBL-USB(TM) FX2LP18 Last Update: 17/08/2011
AN15652 - Interfacing a Cypress MoBL-USB(TM) FX2LP18 with an Intel PXA27x Processor Last Update: 22/06/2011
Getting started with AT2LP™ - AN64673 Last Update: 11/03/2011

Product Change Notice (PCN) (10)
PCN125156 Last Update: 18/06/2012
PCN115048 Last Update: 19/04/2011
PCN094816 Last Update: 23/07/2010
PCN094786 Last Update: 21/04/2009
PCN050862 Last Update: 18/08/2008
PCN050743 Last Update: 14/08/2008
PCN084676 Last Update: 12/08/2008
PCN084633 Last Update: 17/07/2008
PCN071512 Last Update: 17/07/2008
PCN071386 Last Update: 17/07/2008