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Title Customer Rating Updated
Introduction to FRAM - KBA87028
Question: What is FRAM?

Not yet rated
04/15/13
nvSRAM Definition - KBA87014
Question: What is nvSRAM?

Not yet rated
04/15/13
Reference Schematic Design Recommendation for QDR®-DDR II/II+/Xtreme SRAMs - KBA84386
Question: Where can I get a recommended reference schematic design for QDR-DDR II/II+/Xtreme products?

Not yet rated
04/05/13
Generation of FIFO Empty and Full Flags - KBA85082
Question: How are FIFO empty and full flags generated?

Not yet rated
04/04/13
nvSRAM operation at ambient temperature beyond value specified in datasheet - KBA82775
Question: Can an industrial temperature range nvSRAM part be used in applications where the ambient temperature occasionally exceeds 85 °C?

Not yet rated
02/25/13
Understanding of Voh and Vol of QDR SRAMs - KBA82773
Question: Why do the Voh and Vol of QDR SRAMs have the same range in the DC specs section of the datasheet?

Not yet rated
12/20/12
Input Jitter Requirements for 65 nm QDRII/II+/DDRII/II+ Device Family - KBA84380
Question:What are the input jitter requirements for 65 nm QDRII/II+/DDRII/II+ device family?

Not yet rated
11/20/12
How to Resolve QDR-DDR II/II+/Xtreme Verilog Model Simulation Error Using Synopsys VCS - KBA84385
Question:Why Synopsys VCS gives incorrect simulation result with QDR-DDR II/II+/Xtreme verilog models?

Not yet rated
11/20/12
Unused BWSb Pin Termination for ODT Enabled QDR-II+/DDR-II+ SRAM Devices - KBA82774
Question: Explain termination options for unused BWS pins.

Not yet rated
11/07/12
Termination of Input pins in Sync SRAMs - KBA82779
Question: Do all input pins need pull up resistors for termination ?

Not yet rated
11/07/12
I/O Switching Power for Sync SRAM - KBA82208
Question: Is the IDD (VDD operating supply current) current specified in the Sync SRAM datasheets sum of both the core current and I/O current?

(4/5) by 1 user
10/18/12
Removal of External Pull-up Resistor (R) to Vt on D bus, BWSb, and K/Kb Clocks for QDR II+ and DDRII+ ODT Parts - KBA82936
Question: Can the external pull-up resistor (R) to Vt on D bus, BWSb, and K/Kb clocks be removed for QDRII+ and DDRII+ ODT enabled parts?

Not yet rated
10/10/12
Back to Back Write in Synchronous SRAMs - KBA82781
Question: Can /WE be kept LOW during back-to-back write or does it has to be toggle on every write on this back-to-back transaction in Synchronous SRAMs?

Not yet rated
10/03/12
Footprint / Landpattern of an SRAM?
Where can i get recommended footprint / Landpattern for standard packages?

Not yet rated
09/12/12
Types of Burst Modes in Single Data Rate Synchronous SRAMs - KBA80733
Question: What are the types and functions of burst modes in Standard Sync/NoBL SRAMs (single data rate synchronous SRAMs)?

Not yet rated
06/26/12
Burst Operation for QDR and DDR Synchronous SRAM Families - KBA80731
Question: How does the burst feature work in QDR and DDR SRAMs, and what are its advantages?

Not yet rated
06/26/12
Advantages of Burst Modes in Single Data Rate Synchronous SRAMs- KBA80732
Question: What are the advantages of burst modes in Standard Sync/NoBL SRAMs (Single data rate synchronous SRAMs)?

Not yet rated
06/26/12
Burst Operation for Single Data Rate Synchronous SRAMs - KBA80730
Question: How does the burst feature work in Standard Sync/NoBL SRAMs (single data rate synchronous SRAMs)?

Not yet rated
06/26/12
Cypress Parts Baking Condition Information
Do Cypress parts require baking? If so, what are the conditions?

Not yet rated
05/24/12
Country of Origin (COO) Information
Where can I find the Country of Origin (COO) of a Cypress product?

Not yet rated
05/24/12
Maximum Junction Temperature and Power Consumption Calculator
How can I find the power consumption, maximum junction temperature and absolute maximum temperature of an SRAM part ?

(4/5) by 1 user
05/07/12
Recommended Reflow for Cypress Parts Information
What is Cypress’s Parts Recommended Reflow?

Not yet rated
04/20/12
Cypress' Parts Shelf Life Condition Information
What is Cypress’s Parts Shelf Life condition?

Not yet rated
04/19/12
Address pin numbering in QDR II SRAMs
Why are the address lines not numbered in the pin out section of the QDR II datasheet?

Not yet rated
04/18/12
Difference between CY14B101K and CY14B101KA
What is the difference between CY14B101K and CY14B101KA?

Not yet rated
04/16/12
Why do your address pins not match Samsungs or other vendors?
Parts by other vendors are obsolete. In the Cypress equivalent part the address and data lines are different. Can i use Cypress part without changes in firmware?

Not yet rated
04/16/12
List of obsolete PROM parts
What is the status of PROM parts manufactured by Cypress?

Not yet rated
04/11/12
Initial value of NVSRAM contents after purchase.
What is the value of the contents of the NVSRAM when the device is initially shipped? Can i assume a fixed set of data in the non-volatile memory of the NVSRAM?

Not yet rated
04/11/12
Considerations when migrating from Samsung to Cypress QDRII/DDRII SRAMs
What are the considerations that need to be made when migrating from Samsung to Cypress QDRII/DDRII SRAMs

Not yet rated
03/29/12
ISB2 vs Temp and ISB2 vs VCC for CY62147EV30
Provide the characterization data for ISB2 vs Temp and ISB2 vs VCC

Not yet rated
03/13/12
MoBL SRAM Definition
What are MoBL SRAMs?

Not yet rated
03/13/12
Vss and Vcc clarification
Which pin is ground: Vcc or Vss?

Not yet rated
03/13/12
Battery back up for SRAM's
Does Cypress recommend any lithium battery backup for SRAM's?

Not yet rated
03/13/12
Floating data input on CMOS SRAM
I used a SRAM which has a x32 configuration and now I am forced to use a x36 configuration. I have the 4 unused inputs floating. Is this okay?

Not yet rated
03/13/12
Do Address pins have internal Pull-up or Pull-down circuits?
Do you have internal pullups or pulldowns on your address pins so that they may be left floating?

Not yet rated
03/13/12
Do you have Land Patterns or layouts
Do you have a recommended land pattern for my Cypress device?

Not yet rated
03/13/12
Does
What does the 'T' at the end of some part numbers mean?

Not yet rated
03/13/12
DRAM Availability
Does Cypress make DRAM?

Not yet rated
03/13/12
How to Submit Parts for FA
How can I send a device in for failure analysis?

Not yet rated
03/13/12
DLL Considerations in QDRII/DDRII SRAMs
How do QDRII/DDRII SRAMs behave in DLL disabled mode

Not yet rated
03/07/12
Address and I/O Pin Order Flexibility for the Standard Synchronous and NoBL™ SRAMs
Address pin and I/O pin order

Not yet rated
03/07/12
Echo clocks in QDR-II?
Why do QDR II devices have Echo clocks?

Not yet rated
03/06/12
Constraints and Interchangeability of Data and Address pins in Sync SRAMs
What are the design constraints in the interchangeability of data and address pins in Sync SRAMs?

Not yet rated
03/06/12
/BUSY & /INT signal architectures: Migrating from RAM28 to RAM42 technology
What is the difference in the IO architecture for /BUSY and /INT signals between the RAM28 and the RAM42 Dual Port SRAMs?

Not yet rated
02/13/12
/BUSY Signal in Dual Port SRAMs
/BUSY signal functionality in Dual Port SRAMs

Not yet rated
02/07/12
Corruption in a particular location of nvSRAM even though WE# is pulled up to Vcc
Please explain the reason for corruption in a particular location of nvSRAM ( Typically 0x0000) even though WE# is pulled up to Vcc.

Not yet rated
01/30/12
Erase contents of SRAM
What is the voltage at which we can ensure the contents of SRAM are completely erased?

Not yet rated
01/04/12
QDR Clocking
Question: In the QDR SRAM should only one of the clock pair, C/C#, CQ/CQ# be used?

Not yet rated
01/01/12
QDR Applications
Question: What are the typical applications of QDR srams?

Not yet rated
01/01/12
what is QDR?
Question: What is a QDR?

Not yet rated
01/01/12
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