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Title	Updated
Using the printf Function in PSoC® 3 - KBA83472 Question: How do I use the printf function in stdio.h to send data to UART?	01/08/13
STA Warnings IN PSoC® 3 ES3/Production Release Silicons- KBA 84739 Question: Why do I get Static Timing Analysis (STA) warnings in my design for PSoC® 3 ES3 and Production release silicons and PSoC 5LP? I do not get these warnings if I port the project to PSoC 3 ES2 or PSoC 5.	12/06/12
Interrupt Priority Level in PSoC1 Is there any way to change the priority level of an interrupt? If a higher priority interrupt occurs while a lower priority interrupt is executing, will it be pre-empted?	12/31/11
Maximum number of Full Duplex UARTs possible in a PSoC1 How many Full Duplex UARTs can be integrated in a PSoC1?	12/30/11
Using the Sleep Timer How do I use the Sleep Timer?	01/01/12
Multiple I2C Addresses in PSoC1 How can I implement multiple I²C addresses (multiple slaves) using only one I²C module?	12/31/11
Verilog statement with the tristate value Z generates an error in PSoC Creator How to assign High Z state to a pin in Verilog?	12/29/11
SPI bootloader in PSoC1 Why isn't there an SPI bootloader for PSoC1?	12/31/11
UART - Duty cycle of the Clock Input Does the duty cycle of input clock to a UART affect the communication?	12/28/11
AN78737 - PSoC® 1 - Temperature Sensing Solution using a TMP05/TMP06 Digital Temperature Sensor AN78737 enables designers using the PSoC 1 - CY8C28xxx family to quickly and easily interface with Analog Devices’ TMP05 or TMP06 digital temperature sensors.	12/14/12
AN2249 - PSoC® 1 Psuedo-Random Sequence Generator User Module as a One-Shot Pulse Width Discriminator and Debouncer AN2249 describes how to use a Pseudo-random sequence generator (PRS) user module to debounce noisy comparator output signals.	12/11/12
AN2108 - PSoC® 1 - Implementing Hysteresis Comparator AN2108 explains multiple implementations of a hysteresis comparator using PSoC® 1. Hysteresis is necessary to produce a glitch free comparator output when there is noise in the inputs signals.	12/11/12
AN2283 - PSoC® 1 Sensing - Measuring Frequency AN2283 discusses methods to measure frequency using PSoC® 1.	12/11/12
Adding Component Primitives/Verilog Components to a Project - KBA81772 Question: How do I add Cypress-defined Verilog components like the base quadrature decoder or base SPI to my project?	08/29/12
I2CHW User module Slave operation How to implement I2C slave using I2CHW user module in PSoC1?	03/23/12
IrDA stack in a PSoC Is there an IrDA stack or a portion of the IrDA stack available for the PSoC1?	12/31/11
Using an External 32KHz Oscillator Is it possible to drive the PSoC with an external 32KHz Oscillator?	01/01/12
Maximum I2C transaction length in PSoC What is the maximum length of an I2C transaction in PSoC?	12/31/11
UART Warning - 'UART should not be used along with a Power Setting that has SysClk freq less than 24MHz' I am getting a warning message in my UART project: "Instance name-UART User Module-UART Configuration-lm6222: Level 1 Warning - UART should not be used along with a Power Setting that has SysClk freq less than 24MHz." Would you explain what this warning message means.	12/30/11
Usage of DigBuf to route signals at the output How do I implement a Digital Buffer using PSoC 1 in my design?	03/23/12
Using a 9-bit UART I have an application that uses a 9-bit serial bus format (Multi-Drop Bus - MDB) to communicate between various modules. There are 8 data bits and 1 "flag" bit to tell whether the remaining 8 bits are address or data. Is there any way to do this with 8-bit UART in PsoC1? Could we possibly hijack the parity bit and use it as a settable flag?	12/31/11
AN62510 - Implementing State Machines with PSoC® 3 / PSoC 5LP The method to implement state machines using the PSoC® 3 / PSoC 5LP family of devices is explained in this Application Note. Mealy and Moore state machines implementations are shown with associated projects.	12/05/12
Difference between count & clock pins of PSoC 3/5 Counter component What is the difference between count & clock pins of PSoC 3/5 Counter component?	02/17/12
Connecting the EOC Signal of Del-Sig ADC to a Digital o/p pin in PSoC3 When EOC pin of Delta-Sigma ADC of PSoC3 is connected to a Digital Output Pin, I'm not able to view the EOC signal on the pin. Why?	06/25/11
Asynchronous clock warnings (STA) for a SPI based PSoC Creator project	06/23/11
Setup Time & Skew violation warning messages (STA) for a SPI based PSoC Creator project	06/23/11
Static Timing Analysis in PSoC Creator	06/22/11
Using printf function in PSoC3 to send data to UART When ‘printf’ function is used in PSoC3 to send data using UART, project compiles without errors but I do not receive anything at receiver side. How do I make ‘printf’ function work in PSoC Creator?	06/19/11
EEPROM - Usage Notes What are the important factors to remember while using the E2PROM user module?	02/28/11
Input Leakage Current of a GPIO The DC Electrical Characteristics for GPIO mentions "Gross Tested to 1uA" for the input leakage current. What does this mean? What is the minimum and maximum values for leakage currents for a psoc GPIO over the industrial temp range?	02/28/11
Connecting Hardware Blocks to Pins Can I Connect Any Hardware Block to Any IO Pin?	03/20/11
Global Out Net routing restrictions Can I route different signals like two digital block outputs to same pins of two ports like P4[0] and P2[0]?	02/26/11
Changing the duty cycle of PWM How do I change the Duty Cycle of a PWM?	02/27/11
Comparator Bus What is the use of comparator bus in the analog blocks of PSoC?	03/22/11
Finding Analog/Digital resource usage in PSoC Creator How do I find Analog and Digital resource usage of a PSoC 3/5 project in Creator?	03/14/11
Limitations of STA tool in PSoC Creator What are all the limitations of Static Timing Analysis tool in PSoC Creator	06/17/11
Reading a verilog component implemented in PSoC 3/5 PLDs by CPU/DMA How can CPU/DMA read from a verilog component implemented in PLDs of UDB Blocks.	03/29/11
Comparing Digital Signals within the PSoC and outputting Them to a I/O Pin How do I output a digital signal through an analog comparator in a PSoC and output the singal to a I/O Pin ?	03/18/11
Global Even and Odd Buses in PSoC1 What are the differences between Global Even and Global Odd nets and when should they be used?	03/22/11
Gates in UDB Block of PSoC 3/5 How many gates does the UDB of PSoC 3/5 have?	05/07/12
Effect of using P2[4] for digital signals on AGND What is the effect of using P2[4] for digital signals on AGND on PSoC 1?	03/28/11
Difference between Bank 0 and Bank 1 registers What is the difference between Bank 0 registers (User space registers) and Bank 1 registers(Configuration space registers)?	03/27/11
ADC and DAC Clock Phases I have a SAR6 and a DAC6 hooked up together but I get wrong results.	11/30/10
Low to High transition on the TX pin during Reset When using the UART (or TX8) user module, when the device gets reset, there is a Low to High transition on the TX pin. Why does this happen and what is the work around to avoid this transition?	05/24/11
Digital Input Row Synchronizers Why the accuracy of Digital block in PSoC1 does not improve even when an accurate external clock is selected?	03/27/11
Digital Input Voltages Are digital input voltages the same at both 3.3V and 5V?	11/29/10

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