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Title	Customer Rating	Updated
Comparator Generating Multiple Interrupts My comparator is triggering multiple interrupts. What could be the reason and how to prevent the same?	Not yet rated	08/03/12
Measuring Relative Humidity / Pressure using PSoC1 How to measure environmental variables like Relative Humidity or Pressure using PSoC1?	Not yet rated	03/24/12
Definitions of INL and DNL in an ADC What does INL and DNL mean in an ADC ?	(4.5/5) by 2 users	12/14/11
DTMF Decoder How do I implement DTMF Decoder in PSoC1 ? I can't find the DTMF Decoder User Module available in PSoC1.	Not yet rated	11/29/11
PSoC DAC Architecture How is the DAC implemented inside PSoC?	Not yet rated	11/25/11
Connecting an Analog Signal on P0[x] to an ADC How do I connect a signal from and analog input pin on Port0 to an ADC?	Not yet rated	06/26/11
Wrong ADC Output - Possible Causes Even though there is a change in the input signal, the ADC output does not change. What could be the reason for this?	(5/5) by 2 users	06/26/11
Over Sampling Ratios supported by PSoC 3/5 Del-Sig ADC What are the Over-Sampling Ratios (OSR) being supported by PSoC 3/5 Delta-Sigma ADC?	(5/5) by 2 users	06/25/11
DAC8 as Reference to a PGA I am using the output of a DAC8 as reference to a PGA, but it does not work. What could be the reason?	(4/5) by 1 user	06/12/11
LowLimit input of Comparator (COMP) I am using COMP user module with the LowLimit input connected to output of PGA, placed in adjacent CT block. But the LowLimit input is not coming as desired.	Not yet rated	05/29/11
Bandwidth of Continuous Time Operation Amplifier of CY8C26xxx/CY8C25xxx and CY8C27xxx. What is the bandwidth of a continuous time op-amp?	Not yet rated	05/29/11
The drive strength of the output drivers of the QDR-II SRAM How to control the drive strength of the output drivers of the QDR-II SRAM?	Not yet rated	03/30/11
DAC using CY8C21x23 Is is possible to have a 6 bit or 8 bit DAC in CY8C21x23 device?	Not yet rated	03/30/11
Frequency Limits on Low-Pass Filter and BandPass Filter User Modules What are the upper and lower limits of input signal frequency of the low-pass filter and the band-pass filter user modules, at all the different power levels?	(4/5) by 1 user	03/30/11
Analog Reference Power setting in PSoC designer When should I set the reference power to REF HIGH?	(5/5) by 1 user	03/30/11
Insamp Output Why does the output is non-zero, when 0V is applied across the input of the INSAMP?	Not yet rated	03/27/11
Analog Column clock for 3-OpAmp topology Instrumentation Amplifier Does the analog column clock has an effect on the output of 3-OpAmp topology Instrumentation Amplifier?	Not yet rated	03/27/11
ADC Sample Window and Noise Rejection How do I select the ADC sample window for rejecting certain noise frequencies, for example power supply noise?	Not yet rated	03/27/11
DAC current control in Enhanced comparator user module of CY8C22345 In enhanced comparator user module of CY8C22345, how do I control the DAC current (5 bit) if I select VDACL or VDACR as one of the input?	Not yet rated	03/27/11
Differential Amplifier How do I implement a differential amplifier in PSoC?	Not yet rated	03/27/11
Cascading PGAs - Maximum Gain What is the maximum gain that can be achieved by cascading PGAs?	Not yet rated	03/27/11
PSoC1 Comparator output routed to a pin How do I route a Comparator's output to a Pin in PSoC Designer?	Not yet rated	03/26/11
Incorrect results from ADCs while debugging Why do analog to digital converter (ADC) user modules return inconsistent and/or incorrect values when using the debugger to go through the code step-by-step, even when the measured voltage is a known, constant value?	(5/5) by 1 user	03/26/11
Changing clock phase of an ADC dynamically How do I change the ClockPhase parameter of an ADC dynamically?	Not yet rated	03/24/11
ADC Errors and Techniques to Compensate these Errors What are the offset and gain errors in PSoC ADCs? How do I reduce these errors and improve the accuracy of an ADC?	Not yet rated	03/24/11

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