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Title Customer Rating Updated
Using CSD2X UM with CY8C22X45/CY8C21X45 - KBA84272
Question: When I create a new project with the CY8C22x45 or CY8C21x45 family of devices and place the CSD2X User Module (UM) version 1.0, the configuration wizard is empty. What is the workaround for this?

Not yet rated
01/07/13
Comparator Generating Multiple Interrupts
My comparator is triggering multiple interrupts. What could be the reason and how to prevent the same?

Not yet rated
08/03/12
CY8C20xx7 device family supports water tolerance applications
Does the CY8C20xx7 device family support water tolerance applications?

Not yet rated
06/13/12
Key features of CY8C20xx7 device family
What are the key features of CY8C20xx7 device family?

Not yet rated
06/13/12
CY8C20xx7 device family support I2C transaction without clock stretching
Does the CY8C20xx7 device family support I2C transaction without clock stretching?

Not yet rated
06/13/12
Alternate pin for SPI slave clock pin in CY8C20xx6
How to use the the alternate pin for SPI slave clock pin in CY8C20xx6

Not yet rated
06/13/12
Measuring Relative Humidity / Pressure using PSoC1
How to measure environmental variables like Relative Humidity or Pressure using PSoC1?

Not yet rated
03/24/12
Using DMA to transfer data to SPIM of PSoC 3/5 on TX_FIFO_NOT_FULL flag
SPI Master + DMA (rising edge trigger) configured to work on TX_FIFO_NOT_FULL flag is transmitting only the first data. Why?

Not yet rated
02/17/12
Difference between count & clock pins of PSoC 3/5 Counter component
What is the difference between count & clock pins of PSoC 3/5 Counter component?

Not yet rated
02/17/12
Definitions of INL and DNL in an ADC
What does INL and DNL mean in an ADC ?

(4.5/5) by 2 users
12/14/11
DTMF Decoder
How do I implement DTMF Decoder in PSoC1 ? I can't find the DTMF Decoder User Module available in PSoC1.

Not yet rated
11/29/11
PSoC DAC Architecture
How is the DAC implemented inside PSoC?

Not yet rated
11/25/11
Connecting an Analog Signal on P0[x] to an ADC
How do I connect a signal from and analog input pin on Port0 to an ADC?

Not yet rated
06/26/11
Wrong ADC Output - Possible Causes
Even though there is a change in the input signal, the ADC output does not change. What could be the reason for this?

(5/5) by 2 users
06/26/11
Over Sampling Ratios supported by PSoC 3/5 Del-Sig ADC
What are the Over-Sampling Ratios (OSR) being supported by PSoC 3/5 Delta-Sigma ADC?

(5/5) by 2 users
06/25/11
Sending more bits of data than configured using SPIM Component in PSoC Creator
Can I transfer 16 bit data when the SPI master is configured for 8 data bits in PSoC Creator?

Not yet rated
06/25/11
1-Wire Communication - Pull Up Resistor
Is an external pull up resistor required in 1-wire communication?

Not yet rated
06/13/11
DAC8 as Reference to a PGA
I am using the output of a DAC8 as reference to a PGA, but it does not work. What could be the reason?

(4/5) by 1 user
06/12/11
Drive strength differences between GPIO and SIO pins in PSoC 3/5
What are the differences in drive strength between GPIO and SIO pins in PSoC 3/5?

Not yet rated
06/12/11
USBFS Not Appearing as Bootloader I/O in PSoC Creator
My USBFS component does not appear as the Bootloader I/O component in the Systems tab of design wide resources in PSoC Creator. How to solve this?

Not yet rated
06/12/11
ISR connected to Timer Interrupt is being executed multiple times.
The ISR connected to Timer interrupts seems to get executed multiple times. Why is it so and how to solve this problem?

Not yet rated
05/31/11
LowLimit input of Comparator (COMP)
I am using COMP user module with the LowLimit input connected to output of PGA, placed in adjacent CT block. But the LowLimit input is not coming as desired.

Not yet rated
05/29/11
Bandwidth of Continuous Time Operation Amplifier of CY8C26xxx/CY8C25xxx and CY8C27xxx.
What is the bandwidth of a continuous time op-amp?

Not yet rated
05/29/11
Calibrate the PSoC Internal Temperature Sensor
How do you calibrate the temperature of the FlashTemp user module?

Not yet rated
05/29/11
Low to High transition on the TX pin during Reset
When using the UART (or TX8) user module, when the device gets reset, there is a Low to High transition on the TX pin. Why does this happen and what is the work around to avoid this transition?

Not yet rated
05/24/11
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