Knowledge Base Article
The need for a pull up resistance on the WE# of the nvSRAM is explained in the KB article: Pull up resistor on WE# control line of nvSRAM
However, certain controllers/FPGA may pull the I/O's low during its startup. As a result of this, the WE# may be pulled low by the controller/FPGA and the pull up resistance on the WE# may not be effective in ensuring a logic HIGH on the WE# pin.
In such a scenario, the customer must ensure that controller/FPGA should be configured to tri-state its pins during boot up phase.