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Title Updated
I2C Lines at 1.8V
What should be the GPIO setting for I2C lines when they are used at 1.8V for CY8C2xxxx?
03/27/11
Drive mode for maximum driving strength
Which drive mode should be used for providing the best possible drive strength? Is it possible to tie multiple lines together in order to drive higher load?
03/27/11
ESD level for GPIOs of PSoC1 CY8C20X66
What is the ESD acceptance level on GPIO pins of CY8C20xx6A family chip?
03/27/11
Configuration of P1[0] and P1[1] when not used
How should the P1[0] and P1[1] be configured in the project if they are used only for ISSP?
03/27/11
RTC Interrupt at a Specific Time - CY8C22x45
I would like to generate an interrupt from the RTC in CY8C22x45 when the RTC's time equals a preset time. Is the RTC module in CY8C22x45 capable of generating an interrupt at a specific time? If not, how can this be implemented?
03/27/11
Default Stae of GDx and PWx Pins at Power Op or Reset - CY8CLED04D01
What is the default state of GDx and PWx pins of CY8CLED04D01 at power up or during reset?
03/27/11
Comparision between Asynchronous and Synchronous Dual-Port RAMs
- What are the main differences between Asynchronous and Synchronous dual-port rams? - What are the advantages and disadvantages of using either one of them? - Under which circumstances is it better to use Async/Sync? - Should I use asynchronous or synchronous dual-ports for my application? - I have a fast processor. Should I use a synchronous or asynchronous dual-port?
03/27/11
Pulling multiple I/Os to Vcc through only 1 pull up resistor
Is it fine to pull up (or down) multiple signals through only 1 resistor?
03/27/11
Read data problems in synchronous dual-ports
Why is the data read from a synchronous dual-port always the last word written even though the read address is different than the write address?
03/27/11
Writing data into the dual-port
- After the data is clocked into the sync DPRAM, on which clock is the data actually written to the memory? - How long does it take for data written into the dual-port to be accessible?
03/27/11
AT2 for an USB2.0 compact flash card reader
Can (CY7C68300A) AT2 be implemented for an USB2.0 compact flash card reader?
03/28/11
CY7C68300 / CY7C68300A -- ATA polling.
Can the AT2 be set to polling mode, rather than relying on the ATA IRQ signal?
03/28/11
EEPROM Compatibility for AT2
Does the CY7C68300A use the same EEPROM as the CY7C68300?
03/28/11
BULK TRANSFER Rate with CY7C68013
Can we guarantee 4 512 bytes packets per microframe data rate for bulk transfer mode through proper register settings?
03/28/11
Maximizing Transfer Rate with the FX2/FX2LP
What is the maximum USB throughput achievable with EZ-USB FX2/FX2LP?
03/28/11
CY7C68300 - Putting AT2 into Suspend.
How to get the AT2 go into a suspend mode without the USB bus (CY7C68300 silicon only)?
03/28/11
FX2LP Bulk OUT Transfer Followed by Bulk IN Transfer
Can FX2LP perform a Bulk OUT transfer, and immediately after it has completed, follow with a Bulk IN operation? Is a provision necessary for some kind of handshaking between FX2LP and the host so as to ensure proper operation in this case?
03/28/11
IMO Stability with Temperature and Voltage
What is the 24 MHz Oscillator's stability, frequency swing and drift with temperature, voltage?
03/28/11
Device stall an IN/OUT endpoint
In general, when should a Device stall an IN/OUT endpoint?
03/29/11
How to interpret the ESD numbers 'ESD=2200V ESD=500V'
How to interpret the ESD numbers "ESD=2200V ESD=500V" given in QTP report?
03/30/11
Using two 16-bit nvSRAMs in parallel in order to interface with a 32-bit microprocessor data bus
Is it acceptable to use two 16-bit parallel nvSRAM devices in parallel in order to interface with a 32-bit microprocessor data bus?
03/30/11
Minimum voltage required at VCAP pin to complete AutoStore?
What is the minimum voltage required at VCAP pin to complete AutoStore?
03/30/11
User defined area in CapSense Express device
Is it possible to store your own data like firmware version in the register space of CapSense Express device?
04/01/11
NAND supported by NX2LP controller
Does the controller supports both MLC and SLC NAND devices?
04/03/11
Difference between the power characteristics of the CY7C68023 and CY7C68024
What is the difference between the power characteristics of the CY7C68023 and CY7C68024?
04/03/11
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