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Title Updated
Power dissipation of CY2304SI
What is the maximum power that you would recommend that the CY2304SI parts dissipate and remain within your recommended range while at 85 C ambient?
11/22/13
PSoC® 3, PSoC 4 and PSoC 5LP Flash Memory Organization and Array ID Parameter – KBA84740
Question: How is flash memory organized in PSoC 3, PSoC4 and PSoC 5LP? How do we choose the array ID parameter for the CyWriteRowData API?
11/27/13
Depth Expansion of CY7C42x1 / CY7C42x1V Synchronous FIFOs
12/13/13
Does Cypress West Bridge Controller Antioch and Astoria support SDHC?
12/13/13
CY3681 Board Schematic – KBA89333
Question: Where is the schematic of the CY3681 EZ-USB® FX2™ Development Kit?
01/06/14
Electrical Specification of the EZ-USB® FX2LP™ USB Interface – KBA89332
Question: Where can the electrical specification of the FX2LP™ USB interface be found?
01/06/14
PLLs in CY254xx and MoBL Clocks
How many PLLs are available in the CY254xx and MoBL Clock families of clock generators?
01/17/14
Crystal Requirements for EZ-USB® AT2LP™ Parts - KBA88223
Question: What are the crystal requirements for EZ-USB® AT2LP™ parts?
02/17/14
Configuring EZ-USB® HX2VL Using Both Pin Strapping and EEPROM at the Same Time – KBA89014
Question: Can EZ-USB® HX2VL be configured using both pin strapping and EEPROM at the same time?
03/06/14
EZ-USB® FX1™/FX2™/FX2LP™ Endpoints - KBA88226
Question: How many endpoints do EZ-USB® FX1™/FX2™/FX2LP™ have?
03/11/14
Capacitance on USB Hub Downstream VBUS Line - KBA89330
Question: Is the large capacitor on the downstream VBUS lines really required? It causes a slow drop of the line voltage when the hub is unplugged or unpowered.
03/11/14
Pin 57 (TAB) of EZ-USB® HX2LP™ - KBA89318
Question: The schematic of the HX2LP™ Reference Design Kit has pin 57 (TAB) connected to ground. The HX2LP chip has only 56 pins. Where can pin 57 be found? What is its purpose?
03/11/14
Crystal Pin Parameters of EZ-USB® HX2VL™ - KBA89257
Question: What are the values of the following parameters of EZ-USB® HX2VL™?
03/17/14
PCB Design Guides for USB Hubs (CY7C656xx) – KBA89013
Question: Are there any application notes or design guides for the USB hub (CY7C656XX) PCB design?
03/17/14
Maximum Capacitive Load of the Analog Buffer Output of PSoC® 1 – KBA88254
Question: What is the maximum capacitive load that can be driven by the analog buffer output of PSoC® 1?
04/02/14
Board Layout Recommendations For The CY22393
Does Cypress offer PCB Layout recommendations for the CY22393?
04/04/14
Spread Spectrum Clock (SSC) Input to Cypress Clock Device
Can I give Spread Spectrum Clock (SSC) input to any Cypress Clock device?
04/11/14
Connecting PA6 of CY7C67200 – KBA91199
Question: How do you connect the A6 pin of CY7C67200 in the host application?
04/21/14
Capacitor Value on the VCCD Pin of USB-Serial Bridge Controllers - KBA91052
Question: What value of capacitance should be used on the VCCD pin of USB-Serial Bridge Controllers?
04/22/14
Crystal Recommended for SL811HS – KBA91289
Question: Which crystal is recommended for SL811HS, 12 MHz or 48 MHz?
05/08/14
Connecting a 5 V Logic to EZ-USB® FX2™/FX2LP™ Pins – KBA90543
Question: Can you connect a 5 V Logic to FX2™/FX2LP™ pins?
06/03/14
Crystal Drive Level Requirement for EZ-USB® FX2LP™ – KBA90549
Question: In FX2LP™, what does it mean to have a 500 μW crystal drive level requirement?
06/03/14
DMA Capability in the EZ-USB® FX1/FX2/FX2LP™ – KBA88224
Question: Does the EZ-USB® FX1/FX2/FX2LP™ have any kind of DMA or “DMA-like” capability?
06/03/14
Internal Pull-Up or Pull-Down on Port I/O Pins in EZ-USB® FX2™/FX2LP™ – KBA90548
Question: Are there any weak internal pull-up or pull-down resistors on the FX2™/FX2LP™ port pins?
06/03/14
Schematic Review Checklist for EZ-USB® FX2LP™ – KBA90551
Question: Is there a schematic review checklist for FX2LP™?
06/03/14
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