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Title	Customer Rating	Updated
"Invalid characters" error message in PSoC Creator When I try to open a PSoC Creator Project, I get the error: Unable to open the workspace "C:\Documents and Settings\Administrator\桌面\...\psoccreatorproject.cywrk": (Invalid character(s): 桌面) What is the cause and how do I fix this?	(5/5) by 1 user	03/29/11
'Uninitialised Interconnect View' Message - SVG viewer What do I do when I get the message 'Uninitialized Interconnect View' when I go to the interconnect view of PSoC designer?	(5/5) by 1 user	02/02/12
.hex working, .iic not working When I download the hex file to the device it works fine. When I convert the same to .iic file and boot from EEPROM, it is not working. Why?	Not yet rated	09/16/11
24-bit Value and LED/LCD Outputs Using the PSoC Can we read 24-bit data from SPI interface and output value to LED or LCD display after processing? E.g Sames Energy Meter ASIC SA9904	(5/5) by 1 user	12/06/10
A new design will not enumerate. A new design on EZ-USB will not enumerate. What are the things to be checked?	(5/5) by 1 user	09/26/11
AT2LP Pull-Down resistor of DD7 port According to AT2LP datasheet, 1K ohm pull-down resistor is required on DD7 pin. Why the pull-down is needed?	(5/5) by 1 user	07/01/11
AT2LP has a slower HDD format time than CY7C68300A Why AT2LP has a slower HDD format time than CY7C68300A?	(5/5) by 1 user	07/01/11
Accessing FX2 Full/Empty FIFOs What happen if the external master tries to read from an Empty FIFO or write to a full FIFO of the FX2 operating in slave FIFO mode. Will the Fx2 just ignore the write/read?	(5/5) by 1 user	06/19/11
Allocation of Variables at Absolute Address in RAM How do I allocate variables at absolute address in RAM?	(5/5) by 1 user	03/27/11
Analog Reference Power setting in PSoC designer When should I set the reference power to REF HIGH?	(5/5) by 1 user	03/30/11
Any internal pull up/downs on Port I/O pins Are there are weak internal pull ups or pull down resistor on the FX2/FX2LP Port pins ?	(5/5) by 1 user	05/30/11
Assembler Directives to Specify RAM Area and Code Area What are the reserved words in assembler to designate code and data areas?	Not yet rated	03/27/11
Auto Bind Procedure - CyFi SNP Protocol Is it possible to create an auto-bind process with the CyFi Star Network Protocol?	(5/5) by 1 user	12/29/11
Availability of Clone option in PSoC Creator Is clone option available in PSoC Creator as available in PSoC Designer?	(5/5) by 1 user	03/14/11
BIT addressable variables Is it possible to define and use bit addressable variable in C?	(5/5) by 1 user	03/27/11
BSDL file for CY37128V in the 100-pin TQFP(A) package	(5/5) by 1 user	11/24/10
Battery Life Calculator How to calculate the life of battery in a battery powered application	Not yet rated	03/27/11
Bit Addressability of GPIO Pins in PSoC 3 How does one address individual GPIO pins of PSoC 3?	(5/5) by 2 users	10/13/11
Bringing out Shield Electrode in System Level Design for Capsense CSD Is it possible to set the Shield Electrode option for CSD user module in System level design?	(5/5) by 1 user	06/19/11
Burst Counter Operation and chip disabled for synchronous dual port SRAM's If I do a read or write of a number of words and I use the internal counter (ie load the counter start address on the first word and then count after that), but I only give a CE (chip enable) every other clock; will I read data from consecutive address locations every other clock? An example: For a burst read -- first clock load counter, second clock do nothing, third clock give chip enable and read first data, fourth clock do nothing, fifth clock give chip enable and read second data (next one in memory after first), sixth clock do nothing, seventh clock give chip enable and read third data, etc. Note that output enable and counter enable will always be active. Could you confirm this for me?	(5/5) by 1 user	06/11/11
CRC calculation for Capsense Express devices. How is the CRC calculation done for Capsense express devices?	Not yet rated	11/24/10
CSD2X does not work as expected after upgrading to PSoC Designer 5.1	(5/5) by 1 user	04/29/10
CY3261 firmware and RGB software Where is the CY3261 kit documentation available ?	(5/5) by 1 user	12/05/11
CY3655 kit example project for EnCore II Why can't I find the example project, "Draw USB" for Encore II - CY7C63xxx in the Example Projects folder in PSoC Designer installation directory?	(5/5) by 1 user	06/09/11
CY7C67200 default VID/PID What is the default VID/PID for the CY7C67200?	Not yet rated	09/26/11

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