Endian Format in a PSoC® 3/4/5LP Device Versus a Compiler – KBA91560 Question: The PSoC® 3 Keil Compiler uses big endian format for 16- and 32-bit variables. The PSoC 3 device uses little endian format for muti-byte registers (16- and 32-bit registers). How do you swap the order of the bytes while accessing the register through the CPU and DMA? Is this applicable for PSoC 4/5LP devices that use the GNU Compiler Collection (GCC) or Keil™ Microcontroller Development Kit (MDK) compilers?
Interfacing a PSoC® 3/4/5LP SPI Master Component to SPI Slave Chips – KBA88268 Question: When using PSoC® 3/4/5LP as an SPI master to interface with SPI slaves (such as SPI EEPROMs, SPI-based ADCs, etc.), the data read from / written to the slaves is wrong when CPU speed is decreased (or SPI speed is increased). However, the data is correct for faster CPU speeds (or for slower SPI clock frequencies). What is a possible cause for this issue and how do you fix it?