Nov 11, 2011
If you have not looked at PSoC 3 before, take a look at AN54181 Getting Started with PSoC3 Design Project. It will get you started quickly on a very simple project. And it will also link you to other documentation if you are looking for more information.
Rating:
Be the first to rate
Nov 10, 2011
Are you running out of 8051 code space in your PSoC 3, even after applying all of the Keil C51 compiler's optimizations? If you're using PSoC Creator's default mode, you're probably not taking advantage of many features of the 8051 architecture, which can greatly increase your code efficiency.
One common misconception when programming the 8051 is that the only way to get optimal code is to use 8051 assembler. This is not true, mainly because of the high performance capabilities of the Keil C51 compiler. Most if not all PSoC 3 8051 code can be written in C, and it can be made to be small, fast, and efficient. The cost is that you must use Keil-specific keywords, and C code containing these keywords may not be easily portable to other processors such as the Cortex-M3 in PSoC 5. However, PSoC Creator offers equivalent macros that make porting easier.
In any case, by using these keywords or macros, and with knowledge of some code architecture issues, you can make your 8051 code faster and smaller, and avoid using the PSoC 3 8051 in its slowest and least efficient mode.
The 8051 core is a 256-byte address space that contains 256 bytes of SRAM plus a large set of registers called Special Function Registers (SFRs). A lot of functionality is packed into this “internal space” and the 8051 is most efficient when it works in this space.
 The Keil C compiler defines three memory models—small, compact, and large. The default model for PSoC Creator is large (to maintain compatibility with PSoC 5), but that default can be overridden for individual variables, functions, and even entire modules. The following code illustrates how this works.
 The keywords ‘data’, ‘idata’, and 'pdata' are used to designate other models besides the (default) large model. In the above code, you can see that successively larger models require more flash bytes and more CPU cycles. So one of the most important methods to reduce code size if to place your most often-used variables in one of the internal data spaces.
In addition to the above tip, AN60630 provides a wealth of information on how to further reduce your code size by using the 8051 to its fullest capability.
By Mark Ainsworth
Rating:
Be the first to rate
Nov 08, 2011
Have you ever tried upgrading the firmware on your mobile phone, MP3 player, camera or tablet? The seamless process by which you can do this is facilitated by a bootloader, eliminating the need for an external programmer or disassembling the product. A bootloader is an absolute necessity in consumer technology today, to keep pace with rapidly evolving competition and keep customers excited about your product everyday! For embedded system designers, it also opens up a door to fix bugs in a shipped product.
Figure below shows a typical bootloader system in PSoC3/PSoC5. A PSoC3/PSoC5 bootloader allows you to reconfigure the on-chip hardware as well as to upgrade the application firmware. The devices support I2C and USB as standard communication protocols for bootloading.
 A typical PSoC 3/PSoC 5 bootloader system has the following elements:
To modify or upgrade the bootloadable project in the device, the host sends the new project and data over a communication interface. The bootloader receives this new project code and data, and writes it to the bootloadable flash. It passes control to the bootloadable project once the new project/application is successfully bootloaded.
Here are some facts that you may want to know about PSoC3/PSoC5 bootloaders:
Are you looking for a fast and easy way to add an I2C bootloader to your PSoC 3 or PSoC 5 project? Please refer application note AN60317! Please let us know your feedback in the comments section below.
By Anu MD
Rating:
Be the first to rate
Oct 20, 2011
Manchester Code:
Manchester Code is a digital encoding format in which symbol ‘1’ is represented by a falling edge (high followed by low) and symbol ‘0’ is represented by a rising edge (low followed by high). Both the high and low pulses have equal width which is equal to half the bit period.
 Figure 1
The advantages of Manchester code are:
A Manchester encoder embeds the clock information with data in a simple way: each bit is transmitted with a transition at the middle of bit time. For ‘1’, it is 1 to 0 and for ‘0’ it is from 0 to 1.
An example of a Manchester Code is shown in Figure 2.
 Figure 2
Manchester Encoder:
There are several ways of designing a Manchester Encoder. But doing it “The PSoC Way” requires just an SPI Master and an XOR Gate.
When the SPI Master is configured to operate in Mode 0 where the data is setup on falling edge of the clock and data is latched on the rising edge. The idle state of the clock output is low.
The MISO pin of SPI Master is set to low so that the idle state of the MOSI is low.
The MOSI of SPI Master is XORed with the clock to obtain Manchester Encoded data.
The output thus obtained is in Manchester encoded format.
The waveform shown in Figure 3 demonstrates the same.
 Figure 3
The schematic shown in Figure 4 represents the implementation in PSoC 3.
 Figure 4
The encoded output is to be fed to the Manchester Decoder unit.
Manchester Decoder:
The decoder implementation used here is not based on the direction of the mid bit edge (rising or falling edge), but it is based on the fact that the bit value is present during the first half of bit time, prior to the transition edge. If a delay of 3/4th bit is triggered by the incoming mid bit transition, the value captured at the end of the delay represents the next bit value.
 Figure 5
The clock has to be recovered from the incoming Manchester encoded data signal. As mentioned before, a delay unit is used to obtain the actual data signal. This signal when XORed with the Manchester encoded data gives the Clock.
The waveform is shown in Figure 6.
 Figure 6
In the figure above, Polarity_invert represents the decoded data, and the XORed value shown as the last waveform is the recovered clock.
It can be observed that the Manchester Decoded data can be read upon sampling the data on rising edge of the Recovered Clock. This is demonstrated in the Figure 7.
 Figure 7
A Manchester Decoder block diagram is as shown below:
 Figure 8
From the block diagram, it can be seen that the main functional units are:
The schematic of the Manchester Decoder implementation in PSoC 3 is shown in Figure 9.
 Figure 9
A PWM Component is used to generate a delay of 3/4th of the bit period. When this period has elapsed, a pulse is generated which is fed to the clock input of the D Flip-Flop. The Flip Flop is updated upon this clock input.
Working:
To demonstrate the process of Manchester Encoding and Decoding, the project was built on PSoC 3.
The Manchester encoder was used to send an 8-bit sequence 0x34. The Manchester decoder unit was able to recover clock from the encoded data and also decode the value.
The oscilloscope snap-shot is shown in Figure 10.
 Figure 10
Yellow = Manchester encoded data
Blue = Decoded Serial data (0x34)
Pink = Recovered Clock
From the waveform, it can be seen that when the serial output data is sampled on the rising edge of the recovered clock, the output obtained is 0b00110100 which is 0x34.
However, it should be noted that the first bit transmitted should be 0. Hence, the encoded sequence should be appended by 0 in its first position.
This is used for providing the synchronization to determine the second bit (which is the beginning of the actual sequence).
If the first bit is ‘1’, then the decoded output will be in 1’s complement format of the expected output.
PSoC Value:
The advantages of using PSoC for this design are:
The snap-shot of the code looks like this:
Summary:
Manchester encoder / decoder was implemented in PSoC 3. The output obtained was as expected.
By Gautam Das
Rating:
(5/5) by 2
users
Oct 12, 2011
This blog post tells you how to observe memory locations in the debugger watch window. This is useful if you want to group together and view separate memory locations that are linked by functionality such as DAC configuration, DAC routing and DAC trim. To observe memory in the XDATA space, use the following in the watch window: *((char*)0x01yyy)
Where YYYY is a 2 byte address. This limits the addressable range for XDATA to 64KB. The char designator restricts it to a single byte, which for most debugging purposes is sufficient. *Note: There are no spaces in the name. Other observable memory locations: The address spaces are limited based on address type through the watch window (Keil limit), and everything must be addressed via the 24 bit address. XDATA: 0x01YYYY 64k limit DATA: 0x0000YY 128 byte limit CODE: 0xFFYYYY 64k limit PDATA: 0xFE00YY 256 byte limit Other types: Char is not the only allowable type. For larger values (16 and 32 bit) you can also use int and long: *((int*)0x01YYYY) *((long*)0x01YYYY) Be aware though, Keil is a big endian compiler, so it will interpret memory differently than if you read it out of the memory window. For example: In the memory map: 0x7000 0x7001 0x7002 0x7003 FE 00 00 1F The result of the watch window:
Watch window expressions:
Quick Reference (PSoC 3):
*Limited to 64 KB, no spaces in name
*Limited to 64 KB, no spaces in name
*Limited to 128 B, no spaces in name By Chris Keeser
Rating:
(4.5/5) by 2
users
1 to 5 of
40 Results
| Next >
|
|
|||||||||||||||||||||||||||||||||||||||||||||
Tags: 
XML/RSS
Content on this site may contain or be subject to specific guidelines or limitations on use. All postings and use of the content on this site are subject to the Terms and Conditions of the site; third parties using this content agree to abide by any limitations or guidelines and to comply with the Terms and Conditions of this site. Cypress Semiconductor and its suppliers reserve the right to make corrections, deletions, modifications, enhancements, improvements and other changes to the content and materials, its products, programs and services at any time or to move or discontinue any content, products, programs, or services without notice.
