With its flexibile Analog and Digital resources, PSoC 1 is a very strong candidate for Thermal Management applications.  The PSoC can measure temperature from various types of temperature sensors like Diodes, Analog sensors, I2C based sensors, PWM based sensors and 1 wire sensors.  PSoC can implement a closed fan controller function by using 8 or 16 bit PWMs to drive fans and 16 bit timer to measure speed of the fan from the tach signal provided by some fans.

This video shows how a thermal managament application may be implemented using PSoC 1. 

More information on the kits used may be found in the below links.

CY8CKIT-001 PSoC Platform Development Kit

CY8CKIT-036 Thermal Management Expansion Board

The project used in the demo may be found below.

PSoC Designer Project - Thermal Management

In today s world of mixed-signal systems, many applications require analog quantities including but not limited to voltage, current, temperature, pressure, acceleration, pH, flow, and ECG to be measured and processed. The field of uses ranges from lab and medical equipment operating in controlled environments to industrial equipment running under harsh operating conditions. The analog signals to be measured can range from a few micro-volts in ECG systems to thousands of volts in electricity generation plants.

Unfortunately, there is no such thing as an ideal converter in the real world, where systems have to contend with errors that are introduced into the system and affect the ADC s output. The most important errors are offset and gain errors.  

Refer graph below.  This is a plot of an 8 bit ADC with a range of +2.5V.  X axis denotes the input voltage and Y axis denotes the ADC counts.  The blue line is the ideal ADC output. The red line is the actual ADC output.  Notice the actual output is shifted from the ideal.  This shift is called the offset error.

 
All operational amplifiers have a finite offset voltage at the input.  This offset voltage gets added to the input signal, gets amplified by the amplifier s gain and manifests at the output.  Apart from the amplifier stage, the ADC also has its own offset voltage which adds to the system error.  Offset error is an additive error and can be easily removed from the system.

Graph below is the plot of the same 8 bit ADC with the +2.5V range.  Note that the slope of the actual output is now different from the slope of the ideal output.  This shift in slope is called the gain error.

 
These errors may be removed from a system using many calibration techniques like:

• Correlated Double Sampling
• Two-point Calibration
• Gain calibration using external reference. 

PSoC 1, with its flexible analog resources and routing makes it very easy to implement all of the above calibration techniques.  Depending upon the application, one or more of these methods can be combined to achieve maximum accuracy.
Recently, I, with my friend and colleague Pushek Madaan, wrote an article on this topic in EETimes.  The article may be found in the following link.

Calibrating Amplifiers and ADCs in SoCs

The article in PDF format and the PSoC Designer projects for the Correlated Double Sampling and Two-point calibration technique are attached here in this post.

Happy Signal Conditioning!!

Calibrating Amplifiers and ADCs in SoCs - PDF Article

PSoC Designer Project - CDS Calibration

PSoC Designer Project - Two Point Calibration

One of the most common questions I come across is “How do I measure a negative voltage using PSoC?”  For example, I have a +1V signal that I need to measure using PSoC ADC.  But the PSoC will not take any voltage below VSS.  How do I measure the negative portion of the input signal? 

The solution depends on the answer to two questions. 

Is the signal ground isolated from PSoC ground (VSS)? 
Is the signal AC or DC?

Signal Ground Isolated from PSoC Ground

If the signal ground is isolated from VSS of PSoC, then for both AC and DC input signals, the solution is simple and same.  Bring out AGND to an external pin and then feed the signal with respective to this AGND.

In the schematic above, the internal AGND is brought out on P0[5] using the Analog buffer and the signal is connected between this AGND and the PSoC input.  Set the reference of the PGA (if you are using a PGA to amplify the signal) to AGND and the DataFormat of the ADC to “Signed” and the PSoC is now ready to measure a –ve signal.
More about bringing out AGND to an external pin can be found in the below article.

Bring out AGND to an external pin

Signal Ground is Same as PSoC Ground – AC signal

If the signal ground is same as VSS, and if the input signal is AC, then the signal reference can be shifted from VSS to AGND by using a capacitor and a resistor.

In the above schematic, AGND is brought out to P0[5].  The signal to be measured is connected to the PSoC input through capacitor “C” and the PSoC input is biased to AGND by resistor “R”.  C and R form a high pass filter and hence should be selected in such a way that the input signal is passed without attenuation.  Set reference of the PGA to AGND and DataFormat of ADC to Signed.

Signal Ground is Same as PSoC Ground – DC Signal

When the input signal is DC and the signal ground is same as VSS, then the input can be shifted to AGND by biasing the input to VREFHI.

In the above circuit, the input signal is connected to the PSoC input through resistor R1, and the input of the PSoC is biased to VREFHI using R2.  VREFHI can be brought out to a pin the same way as AGND is brought out, either by using the RefMux user module, or by writing to the ACBxxCR2 register. 

With this circuit, the input signal will be lifted to AGND and attenuated by a factor of 2.  This method works for references that have VSS as REFLO, ie (Vbg + Vbg), (Vdd/2 + Vdd/2) and (1.6Vbg + 1.6Vbg). 

For example, for a reference of (Vbg + Vbg), the Analog Ground is at 1.3V and VREFHI is at 2.6V.  For a +1V input, following are the voltage levels on the input of PSoC for various input signal voltage levels.

From the above table, it is clear that the input signal gets shifted to 1.3V (AGND) and is attenuated by a factor of 2.  One side effect of this method is the difference between the shift created by the resistor network and the internal AGND will be amplified by the PGA.  But this can be compensated in firmware.

Depending on the type of input signal and isolation between signal and PSoC grounds, one of the above methods may be used to measure a –ve signal using PSoC.

Back to the blog world after a long period of inactivity. In the past few months, I have had a chance to work on a very interesting project for our CEO T.J. Rodgers.  He is donating 152 wine fermenters to the U.C Davis School of Enology and Viticulture.   A couple of articles that talk about the project: Blending Science With Wine, UC Davis claims world’s greenest winery

An important part of the fermenter is a temperature controller that controls the temperature of the fermenting grape juice – also known as “Must” – during the fermentation process.  The stainless steel drum that holds the ”must” is surrounded by a jacket through which cold or warm water is passed.  A PSoC is used to sense the temperature of the “must” using a thermistor, and based on the desired set point, controls the flow of cold or warm water through the jacket to maintain the temperature of the “must”.  The PSoC controls the water flow by operating a solenoid valve connected to the outlet port of the jacket. 

In this blog post, I am going to discuss the valve control section of the temperature controller.  This can be used in many other interesting applications like automatic garden irrigation, bathtub overflow control etc.

The primary design challenge was that the temperature controller was battery operated.  Because of this, a continuously on solenoid valve cannot be used.  The solution was a latching solenoid valve from Orbit.

This valve is used in commercial water sprinklers.  The valve has an inlet port and an outlet port for water.  A plunger opens or closes the valve.  This plunger is operated by two magnetic coils.  Energizing one of the coils with a 15V/20mS pulse opens the valve.  Once on, the valve latches and stays on without any further need for power.  Energizing the other coil with the same pulse closes the valve and the valve latches and stays closed.  The schematic of the valve control is shown below.
 

LT1303 is a charge pump, which is used to step up the 3.5V - 4.5V battery voltage to 15V and charge C6, a 2200uF capacitor.  J3 is a socket for the Orbit valve.  The common is connected to the +ve of the 2200uF capacitor.  The other two pins are connected to the drain of T1 and T2, N Channel MOSFETs.  Applying a pulse to the gate of these transistors will discharge the charge in capacitor through the corresponding coil.  Let us have the look at how the PSoC controls this circuit.

The PSoC controls the charge pump through the CH_PMP_SHDN and VB_FB signals.  CH_PMP_SHDN is a GPIO pin configured as StdCPU/Strong and turns on or off the charge pump.  VB_FB is the feedback signal used to sense the voltage on the 2200uF capacitor.  Figure below shows the PSoC Designer resource placement for the valve control.

 
A comparator is used to compare VB_FB with a fixed threshold generated by a DAC6.  The voltage on the 2200uF capacitor is derived by the formula.

Vout = Vref/10K * 160K

where
Vout = Voltage on the 2200uF
Vref = Comparator reference voltage

When the voltage across the 2200uF cross the desired output, the comparator goes high, and the PSoC turns off the charge pump and generates a 20mS pulse on gate of the respective MOSFET to turn On or Off the Orbit valve.

Following code is used to turn on the valve. 

    // Enable the Charge Pump
    CH_PMP_ENABLE;
   
    /* Set Analog reference power to SC On / Ref Med */
    ARF_CR |= 0x06;
   
    /* Start the CMP and DAC modules */
    CMP_Start(CMP_MEDPOWER);
    DAC_Start(DAC_MEDPOWER);
    DAC_WriteBlind(26);
   
    /* A small delay for the DAC and comparator to stabilize */
    DelayMs(5);
   
    /*     Wait for the comparator output to go high
        When comparator output becomes high, it means Vboost is around 18V */
    while(!(CMP_CR0 & 0x80));
   
    // Disable the Charge Pump
    CH_PMP_DISABLE;
   
    // Set the VALVE_ON GPIO
    VALVE_ON_Data_ADDR |= VALVE_ON_MASK;
   
    /* Switch off the CMP and DAC */
    CMP_Stop();
    DAC_Stop();
   
    /* Set analog reference power to all off */
    ARF_CR &= ~0x07;

    // 20mS Delay
    DelayMs(20);
   
    // Clear the VALVE_ON GPIO
    VALVE_ON_Data_ADDR &= ~VALVE_ON_MASK;

Enable the charge pump, switch on the comparator and DAC, wait for the comparator output to go high, disable the charge pump, turn off comparator and DAC and switch on the VALVE_ON GPIO for 20mS.  This will turn on T1 and discharge C6 through the On coil thus turning on the valve.  Similar code is used for turning off the valve where T2 is switched On.

Stay tuned for more interesting topics on the Fermenter!

With a handful of PSoC3 resources and an external capacitor, a Voltage controlled oscillator can be created.

Pin "Cint" is configured as both Digital and Analog pin with a drive mode Open Drain drives low. When output of Comparator is High, IDAC output is connected to the pin.  When comparator output is Low, the pin shorts to Ground.

IDAC – configured as a source – charges an external capacitor connected to "Cint". When the capacitor voltage crosses input voltage Vin, comparator output becomes low (comparator is set for inverted logic) and discharges the capacitor. As capacitor voltage becomes zero, the comparator output becomes high and IDAC starts charging the capacitor. The cycle continues and we get an oscillator whose frequency is inversely proportional to Vin.  The circuit has excellent “Period vs. Vin” linearity.

For a given input voltage, the combination of IDAC value and external capacitor determines the maximum Period (1/f) of the output.  We know that when a capacitor is charged using a constant current, the time taken to charge to a known voltage is

t = C * V / I

For example, if the maximum period value is desired to be 500uS for an input voltage of 2.5V, for an IDAC value of 1uA, the value of C can be calculated:

C = (500uSec * 1uA) / 2.5V = 200pF

The comparator is synchronized to a clock.  The period of the clock should be long enough to discharge the capacitor.  Too high a clock frequency, the capacitor may not discharge completely.  Too low a clock frequency, the % of the "discharge time" to "charge time" will increase and will reduce the linearity.  The value of the clock will also depend on the value of the capacitor.  Higher value of capacitor will require a longer discharge time.

Selecting the right combination of IDAC, Capacitor and the SyncClock is an interesting exercise left to the user.

The project for the above can be found here.