Cypress Perform

The PSoC® architecture consists of configurable analog and digital blocks, a CPU subsystem and programmable routing and interconnect. PSoC lets you plug in predefined and tested IP from the PSoC library of functions, or code your own. Either way, you have the flexibility to build innovation and competitive advantage into your products.



Programable Routing & Interconnect
This frees you to re-route signals to userselected pins, shedding the constraints of a fixed-peripheral controller. In addition, global buses allow for signal multiplexing and logic operations, eliminating the need for a complicated digital-logic gate design.


Configurable Analog and Digital Blocks
The union of configurable analog and digital circuitry is the basis of the PSoC platform. You configure these blocks using pre-built library functions or by creating your own. By combining several digital blocks, you can create 16-, 24-, or even 32-bit wide logic resources. The analog blocks are composed of an assortment of switch capacitor, op-amp, comparator, ADC, DAC, and digital filter blocks, allowing complex analog signal flows. For a partial list of preconfigured functions included in PSoC software, see the sidebars on the next two pages. You can modify and personalize each function to your design.


CPU Subsystem
PSoC offers a sophisticated CPU subsystem with SRAM , EE PROM, and flash memory, multiple core options and a variety of essential system resources including:

• Internal main and low-speed oscillator
• Connectivity to external crystal oscillator for precision, programmable clocking
• Sleep and watchdog timers
• Multiple clock sources that include a PLL

PSoC devices also have dedicated communication interfaces like I2C, Full-Speed USB 2.0, CAN 2.0, and on-chip debugging capabilities using JTAG and Serial Wire Debug. The newest members of the PSoC family offer industry-standard processors like the 8051 and ARM Cortex-M3.


Back to PSoC Overview | Innovation | Design Smarter

Sunset Owner: