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Title Customer Rating Updated
GPIF decoding using the register values
Is it possible to regenerate the GPIF waveform without the .gpf file in FX2LP?

Not yet rated
04/03/11
Pin compatibility between CY7C68300 and CY7C68300A
Is the CY7C68300A pin-compatible with the CY7C68300?

Not yet rated
04/03/11
FX2LP/FX1 RESERVED Pin
How should the RESERVED pin of FX2LP/FX1 be connected?

Not yet rated
04/02/11
FX2LP Get Pipes Information Problems with Windows XP
Why does the Get Pipes information of Cyconsole not display when using the bulk transfer example using Windows XP?

Not yet rated
04/02/11
CY7C68300 / CY7C68300A -- Mass Production Test Tool for the AT2
Does Cypress have a tool that can help verify the AT2 production during the mass production?

Not yet rated
04/02/11
Bus Capacitance Capability (Address, Data and Some Clock Signals) for the CY7C68013-128AC
What is the maximum bus capacitance for the CLKOUT, IFCLK, data and address lines of FX2(CY7C68013) ?

Not yet rated
04/02/11
Errata for CY7C68310
Where can I find the errata for the CY7C68310 (ISD300LP)?

Not yet rated
04/02/11
Will Current Firmware Examples Work with uVision-51?
I have the full version of the old uVision-51 Keil tools that uses .prj for its project files. Will I still be able to use the firmware examples on your development kit CD?

Not yet rated
04/02/11
EZ-USB FX2 Firmware Debugging Issue
After downloading the mon-int-sio1.hex or mon-int-sio0.hex to the EZ-USB FX2LP board, when debugging is started from Keil,the debugger pops up with "target board not found." What can be the reason for this?

Not yet rated
04/02/11
Windows drivers to convert a serial mouse to a USB mouse
Does Cypress provide a HID driver which can be used with a Mouse or Keyboard made with a Cypress USB controller chip?

Not yet rated
04/02/11
Sub-directory C:\Cypress\Usb\Drivers\ezmon contents.
What does the sub-directory C:\Cypress\Usb\Drivers\ezmon contain?

Not yet rated
04/02/11
Gettind Started Tutorial for FX1/FX2LP
Where is the getting started document for FX1/FX2LP located?

Not yet rated
04/01/11
I2C clock frequency of CapSense Exress device
What is the frequency at which I2C slave is configured in CapSense Express devices?

(3/5) by 2 users
04/01/11
User defined area in CapSense Express device
Is it possible to store your own data like firmware version in the register space of CapSense Express device?

Not yet rated
04/01/11
Simtek obsolete part reference for STK10C48
What is the drop in replacement for Simtek STK10C48 series of parts?

Not yet rated
03/31/11
Initial data at power-up for the SRAMs
If you power up the SRAM's, and do not write to any of the locations, is there an inherent predisposition for the registers to settle at either 00,FF, etc.?

Not yet rated
03/30/11
The drive strength of the output drivers of the QDR-II SRAM
How to control the drive strength of the output drivers of the QDR-II SRAM?

Not yet rated
03/30/11
Disabling the echo clock
Is it possible to disable echo clock?

Not yet rated
03/30/11
Use of second chip enable on the SRAM parts ?
Does the second chip enable on the SRAM pars provide any additional functionality?

Not yet rated
03/30/11
Memory controller for the QDR and QDR-II
Can I have the same memory controller for both the QDR" and QDR"-II?

Not yet rated
03/30/11
ZZ pin in Sync SRAM
Is ZZ pin internally pulled up/down? Can it be left floating?

Not yet rated
03/30/11
Consecutive read and write in Pipeline SRAM
How to do consecutive read and write in pipeline SRAM?

Not yet rated
03/30/11
Minimum voltage required at VCAP pin to complete AutoStore?
What is the minimum voltage required at VCAP pin to complete AutoStore?

Not yet rated
03/30/11
VCAP pin connection when not using storage capacitor, VCAP on NvSRAM
If AutoStore is not required, what should be done with the VCAP pin?

Not yet rated
03/30/11
HOLD* signal in SPI NVSRAM
Should any line (Serial Input-SI, Serial Output-SO or Clock-SCK) be pulled LOW when HOLD* (Active Low) pin is asserted in Serial NVSRAMs?

Not yet rated
03/30/11
Using two 16-bit nvSRAMs in parallel in order to interface with a 32-bit microprocessor data bus
Is it acceptable to use two 16-bit parallel nvSRAM devices in parallel in order to interface with a 32-bit microprocessor data bus?

Not yet rated
03/30/11
nvSRAM SEL and SER Data
Explain SEL and SER for Cypress NVSRAM's

Not yet rated
03/30/11
Time taken for Software Store and Hardware Store
What is the difference in time taken for Software and Hardware Store?

Not yet rated
03/30/11
Difference between CIO and SIO
When I select DDR-II family of SRAM's,I can choose between CIO and SIO. What is difference?

Not yet rated
03/30/11
How to interpret the ESD numbers 'ESD=2200V ESD=500V'
How to interpret the ESD numbers "ESD=2200V ESD=500V" given in QTP report?

Not yet rated
03/30/11
Difference between parity bits and regular data I/O lines
Some of the cypress synchronous devices have parity pins. Are these same as regular I/O pins?

Not yet rated
03/30/11
Comparator Bus as Clock Input to Timer

Not yet rated
03/30/11
Code Size of a PSoC Project
How do I find the code size of my PSoC Project?

Not yet rated
03/30/11
DAC using CY8C21x23
Is is possible to have a 6 bit or 8 bit DAC in CY8C21x23 device?

Not yet rated
03/30/11
Frequency Limits on Low-Pass Filter and BandPass Filter User Modules
What are the upper and lower limits of input signal frequency of the low-pass filter and the band-pass filter user modules, at all the different power levels?

(4/5) by 1 user
03/30/11
Analog Reference Power setting in PSoC designer
When should I set the reference power to REF HIGH?

(5/5) by 1 user
03/30/11
"Invalid characters" error message in PSoC Creator
When I try to open a PSoC Creator Project, I get the error: Unable to open the workspace "C:\Documents and Settings\Administrator\桌面\...\psoccreatorproject.cywrk": (Invalid character(s): 桌面) What is the cause and how do I fix this?

(5/5) by 1 user
03/29/11
Serial Wire Debug (SWD) using USB I/O pins in PSoC 3/5
How can I do Serial Wire Debug using USB I/O pins?

(5/5) by 1 user
03/29/11
Assigning I2C SDA and SCL pins to any GPIO in PSoC 3/5
When I try to route the I2C SCL and SDA pins to any GPIO, I get the following error: IO "I2C_SCL(0)" cannot be placed into "PX[x]" because the pin does not support the features required by the IO. (App=cydsfit) What is the reason for this error and how can this be fixed?

Not yet rated
03/29/11
Programmable PLL frequencies in PSoC 3
Can PSoC 3 PLL block be configured to desired output frequencies?

Not yet rated
03/29/11
Interrupt latency calculation for PSoC 3
What is the latency for processing an interrupt in PSoC 3?

Not yet rated
03/29/11
Minimum and Maximum frequency limits of various clock sources in PSoC 3
What are the minimum and maximum frequency limits of various clock sources in PSoC 3?

Not yet rated
03/29/11
Difference between the PWM modes "one shot with a single trigger" and "one shot with multi trigger"
What is the difference between the PWM modes "one shot with a single trigger" and "one shot with multi trigger"?

Not yet rated
03/29/11
Measuring Differential Signals in PSoC 3/5
Is it possible to measure differential input signals in PSoC 3/5?

Not yet rated
03/29/11
Parameters determining the minimum and maximum sample rate of PSoC 3/5 Del Sig ADC
What determines the minimum and maximum sample rate of PSoC 3/5 Del Sig ADC?

Not yet rated
03/29/11
Timing details of DMA transfer in PSoC 3/5
What is the time taken for DMA to transfer N bytes of data on a trigger in PSoC 3/5?

Not yet rated
03/29/11
Config0 byte in I2C EEPROM showing bit 2 setting
Why do some examples for the Config0 byte in I2C EEPROM show setting bit 2?

Not yet rated
03/29/11
Dynamic Switching of the FX2 CPU Clock.
Is it possible to change clock frequency while the chip is running?

(5/5) by 1 user
03/29/11
8051 Core Type in FX2LP
What sort of 8051 core is in the Cypress EZ-USB parts? Is it a Dallas core?

(4/5) by 2 users
03/29/11
Address Valid Time When Using AUTOPTR1/2 for External Data Memory Access
How can we address external memory when using the AUTPOPTR1 or AUTOPTR2 in FX2/FX2LP 8051?

Not yet rated
03/29/11
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