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Title
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Customer Rating
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Updated
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enCoRe security features
How is the enCoRe code secured?
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Not yet rated
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12/01/10 |
OUT endpoint example code for enCoRe(sitlcag)
Do you have any OUT endpoint example code for the enCoRe (CY7C63723/63743) parts?
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Not yet rated
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12/01/10 |
ADC and DAC Clock Phases
I have a SAR6 and a DAC6 hooked up together but I get wrong results.
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Not yet rated
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11/30/10 |
Emulation with packages other than 24 or 40 PDIP in CY3655
The CY3655 DVK allows for emulation of 24 or 40 PDIP parts. How do I emulate other parts of the enCoRe II family?
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Not yet rated
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11/30/10 |
Connecting ADCs to Port Pins
How do I Connect an ADC to Port Pins?
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Not yet rated
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11/30/10 |
Dynamic Reconfiguration
How long does dynamic reconfiguration take?
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Not yet rated
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11/30/10 |
CYSTART for programming M8 parts
How do I use CYSTART to program M8 parts?
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Not yet rated
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11/30/10 |
enCoRe II emulation
Does the CY3655 enCoRe II Development Kit support emulation when an external clock source is used for the enCoRe II's CPU clock?
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Not yet rated
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11/30/10 |
Error - Could not detect pod
When I try to either connect to the ICE or download code to the pod, I get the error message "Could not detect pod," in PSoC Designer. What are the points to be taken care of to avoid this error?
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Not yet rated
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11/30/10 |
Air Gap between Capsense Button and Overlay Material
I have an application which as an air gap between Capsense button and Overlay Material. Are there any good solution to increase the sensitivity?
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Not yet rated
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11/30/10 |
Programming mode for encoreII
What is the difference between power cycle mode, power detect mode and reset acquire mode in PSoC Programmer? What mode is recommended for the enCoRe II devices?
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Not yet rated
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11/30/10 |
Bootloader does not work in PSoC Designer while using ImageCraft
When I enable any code compression options in ImageCraft compiler, bootloader projects do not work. How do I get the projet working?
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Not yet rated
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11/30/10 |
Error Message: "Attached pod (000e1022) is not compatible with the selected PSoC"
I get an error message " Attached pod (000e1022) is not compatible with the selected PSoC" while using the new CY8C27002-24PVXI OCD part while debugging with PSoC Designer. This is the latest revision OCD part (B 05 datecode 1001).
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Not yet rated
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11/30/10 |
Programming encoreII devices using Cat5 Cable
Can the Cat5 cable be used for programming enCoRe II devices?
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Not yet rated
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11/29/10 |
Source for CPU clock in PSoC3/5
What is the source of CPU clock in PSoC3/PSoC5?
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Not yet rated
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11/29/10 |
Unused pins in PSoC 3 and PSoC 5
If there are some pins unused in design, should they be left unconnected or some points should be taken care?
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Not yet rated
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11/29/10 |
I2C pins in PSoC3 and PSoC 5
As per PSoC3 and PSoC5 pin out’s in the datasheet, there are only two sets of I2C pins. Are these the only pins which can be used for I2C or is there a way to use some other pins for I2C?
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Not yet rated
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11/29/10 |
Power sequence for PSoC3 and PSoC5
Is there a power sequence required for different supplies i.e. Vddio, Vdda, Vddd etc in PSoC3 and PSoC5?
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Not yet rated
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11/29/10 |
GPIO (Vddio) operating at voltage higher than Vddd and Vdda in PSoC3/5
Can Vdda and Vddd be at lesser voltage as compared to Vddio? For example Vddio is connected to 5 V and Vdda and Vddd is connected to 3.3V.
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Not yet rated
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11/29/10 |
Multiple ways to actuate a port pin of PSoC3/5 in Firmware
What are the different ways to actuate a GPIO pin in firmware in PSoC Creator for PSoC3/5 ?
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Not yet rated
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11/29/10 |
Steps to port PSoC3 design to PSoC5
Is there any document available which tells how to port the existing PSoC 3 based project to PSoC 5?
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Not yet rated
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11/29/10 |
Dynamically Changing the Drive Mode of Port Pins in PSoC3/5
How can I change the drive mode of port pins of PSoC3/5 in Firmware dynamically?
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Not yet rated
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11/29/10 |
Digital Input Voltages
Are digital input voltages the same at both 3.3V and 5V?
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Not yet rated
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11/29/10 |
JTAG and SWD Pin mapping
How are the JTAG and SWD pins mapped to the 10-pin debug Connector?
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(5/5) by 1
user
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11/29/10 |
Applications built for ES2 do not exit low power (sleep or hibernate) modes cleanly
Why does device not work as expected after coming out of low power mode?
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Not yet rated
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11/29/10 |
Build Warning "name translation failed on C:\PROGRA~1\Cypress - 2."
What does the build warning "name translation failed" mean?
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Not yet rated
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11/29/10 |
CY3207-ISSP Tester I/O Mating Connector
Which is a mating connector with cable for TESTER I/O connector on right side of CY3207-ISSP programmer?
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Not yet rated
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11/29/10 |
Cloning Projects
How do I clone a project to a different PSoC Device?
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Not yet rated
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11/28/10 |
Baseline getting stuck
Why does the CapSense button always remain in ON state ?
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(4/5) by 1
user
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11/25/10 |
Addressing multiple capsense express devices on the same I2C bus
How to address multiple Capsense Express devices on the same I2C bus ?
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Not yet rated
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11/25/10 |
POR default Data structure table
What is the format of the ‘POR default Data structure table’ to be used with the command code ‘03’ for CY8C201xx series?
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Not yet rated
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11/25/10 |
Power down requirements for the CY8C20xx6A, CY8CTMGxxx, CY8CTMAxxx, CY8CTSTxxx, CY7C643xx and CY7C604xx devices
Are there any power down requirements for the CY8C20xx6, CY8C20xx6A, CY8CTMGxxx, CY8CTMAxxx, CY8CTSTxxx, CY7C643xx and CY7C604xx devices ?
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Not yet rated
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11/25/10 |
Effect of Prescaler on sensitivity and SNR
What is the effect of Prescaler on sensitivity and SNR for a CapSense CSD Application ?
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Not yet rated
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11/24/10 |
CSD Rawcounts variation with Temperature changes for CY8C21x34
What is the effect of Temperature on Raw counts on the CSD user module in CY8C21x34 device?
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Not yet rated
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11/24/10 |
CRC calculation for Capsense Express devices.
How is the CRC calculation done for Capsense express devices?
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Not yet rated
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11/24/10 |
Reconfigure device command fails when writing to flash in CapSense Express Devices
Why does the Reconfigure device command fail while writing to flash in CapSense Express devices ?
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Not yet rated
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11/24/10 |
Capsense with a Flex PCB
What are the Design guidelines for using Flex PCB instead of FR4 PCB for CapSense applications?
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Not yet rated
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11/24/10 |
USBD_STATUS_XACT_ERROR (0xC0000011) on high-bandwidth isochronous IN endpoint
When using high-bandwidth isochronous IN endpoint (more than 1024 bytes and less than 3073 bytes per microframe) is used, from time to time we get USBD_STATUS_XACT_ERROR (0xC0000011). What is the reason behind this?
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Not yet rated
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11/19/10 |
Can't uninstall PSoC Designer 4.4
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Not yet rated
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10/04/10 |
Can I connect a CY8CLEDAC01 circuit to a wall dimmer?
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Not yet rated
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10/01/10 |
Effect of increase in resolution over Noise in CapSense
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Not yet rated
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10/01/10 |
LCD connections using 4 data lines
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(4/5) by 1
user
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09/29/10 |
Maximum sink/source current of GPIO pins on EncoreV
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Not yet rated
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09/26/10 |
Why is the SL811HS (slave mode) or SL811S ignoring packets/requests resulting in time-outs?
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Not yet rated
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09/15/10 |
Occurence of Buffer Overrun Error
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Not yet rated
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08/24/10 |
Use of multiple ReNumeration?
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Not yet rated
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08/03/10 |
Accelerating the Voltage Fall on the Downstream VBUS lines of HX2LP
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Not yet rated
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06/21/10 |
CY8CKIT-006 Example Projects do not work with PSoC Creator Beta 4.0
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Not yet rated
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06/17/10 |
I2C Clock Permanently Stuck To Logical Low
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Not yet rated
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06/15/10 |
Sinusoidal Waveform as Reference Clock Signal
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Not yet rated
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06/10/10 |