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Title	Customer Rating	Updated
Overlay material for high ESD (>25KV) environment What overlay materials do you recommend for a high (>25KV) ESD environment. Are there other design techniques for this environment?	Not yet rated	03/10/11
CapSense SNR What is SNR? What SNR is expected out of a CapSense system when a finger touch brings in a capacitance of 0.1pF to the button?	(4/5) by 1 user	03/10/11
Detect Unplugging of USB Cable in Firmware How can we perform unplug detection in firmware?	Not yet rated	03/09/11
SRAM interface with EZ-USB How can I access the interface EZ-USB with SRAM?	Not yet rated	03/08/11
USB to Parallel Converter Using FX2LP How can I use FX2LP to make an usb to parallel converter? The data received over the USB should be made available on a parallel data bus on the GPIO pins.	Not yet rated	03/08/11
Operation of devices outside specified temperature range Will Cypress devices work outside the temperature range specified?	Not yet rated	03/05/11
sram async to sync How can I convert from a fast async. SRAM design to a synchronous SRAM?	Not yet rated	03/05/11
SRAM and DRAM difference What is the difference between an SRAM and a DRAM? Does Cypress manufacture DRAM's	Not yet rated	03/05/11
SRAM Galvantech part numbering scheme Whats the part numbering scheme for the Galvantech SRAM parts?	Not yet rated	03/05/11
SRAM models link Where can I find the models for a particular part on the web?	Not yet rated	03/05/11
SRAM tape and reel requirement What is the tape and reel requirement for Cypress SRAM's?	Not yet rated	03/05/11
Thermal resistances Where do I find information on thermal resistances of SRAM's?	Not yet rated	03/05/11
Criteria for submitting a part for failure analysis What are the criteria requirements to request for component failure analysis?	Not yet rated	03/05/11
Current (Idd) consumption at -40 and +85 degrees? At what temperature does the memory consume the maximum IDD, at -40 or at +85?	Not yet rated	03/05/11
Information on Industry standard JTAG interfaces on SRAM's. What is Cypress position and plans on having or developing "industry Standard" JTAG interfaces on their SRAMs?	Not yet rated	03/05/11
Different in pin out for T version and TA version? why in the data sheet there is a different pin out for T version and TA version?	Not yet rated	03/05/11
Number of times the "Power On Reset" pin state can be reprogrammed in PSoC 3 While trying to change the power on reset state of a pin in the pin configuration window, I see a warning not to reprogram too often. How many times can I reprogram the reset state of a pin in PSoC 3?	Not yet rated	03/04/11
Endian format in PSoC 3 device vs PSoC 3's KEIL Compiler PSoC 3 Keil Compiler uses big endian format for 16-bit and 32-bit variables, however the PSoC 3 device uses little endian format for muti-byte registers (16-bit and 32-bit register). How do I swap the order of the bytes while accessing the register through CPU and DMA?	(4/5) by 1 user	03/04/11
Part Number for the MiniProg3 target connector What is the part number of MiniProg3 target connector and ribbon cable?	Not yet rated	03/04/11
Memory Error detection / correction in PSoC 3 /5 Do the PSoC 3/5 devices have any built in memory error detection/correction feature?	Not yet rated	03/04/11
Use of External code editor for PSoC 3/5 Development Is it possible to use an external code editor for development in PSoC 3/5?	Not yet rated	03/04/11
Renaming Workspace and Project How do I change my PSoC Creator Project and Workspace name?	Not yet rated	03/04/11
State of USB pins during Power on Reset (POR) in PSoC 3/5 What is the Power on Reset (POR) state of USB pins in PSoC 3/5?	Not yet rated	03/04/11
Updating PSoC Creator Components How can we update a component in PSoC Creator?	Not yet rated	03/03/11
Archiving a PSoC Creator Design How do I archive/share my PSoC Creator Design?	Not yet rated	03/03/11
Dynamically changing period of Timers, Counters, and PWMs in PSoC 3/5 How do I change the period of Timer, Counter, and PWM components on the fly in PSoC 3/5?	Not yet rated	03/03/11
Differences between SIO and GPIO pins in PSoC 3/5 What are the differences between SIO and GPIO pins in PSoC 3/5?	Not yet rated	03/03/11
Selecting JTAG or SWD debug protocol in PSoC Creator How do I select JTAG or SWD (Serial Wire Debug) debug protocol in PSoC creator?	(5/5) by 1 user	03/03/11
Multiplexing Analog inputs to an ADC in PSoC 3/5 How do I multiplex analog inputs to the ADC in PSoC 3/5?	Not yet rated	03/03/11
Building an analog Low Pass Filter using PSoC3 Analog Can I build an analog filters using PSoC 3/5? (or) Can I port a PSoC1 filter to PSoC3/5?	(3/5) by 4 users	03/03/11
Difference between PSoC 3/5 SC Blocks and PSoC1 SC Blocks What is the difference between PSoC 3/5 SC blocks vs PSoC1 SC blocks?	(3/5) by 2 users	03/03/11
Difference between uncommitted Op-Amp (25mA) and the Op-Amp used for PGA/TIA in PSoC 3/5 What is the difference between uncommitted Op-Amp (25mA) and the Op-Amp used for PGA/TIA in PSoC 3/5?	Not yet rated	03/03/11
Keil Compiler Registration and code size limitation with PSoC Creator How do I remove the below errors encountered when using the Keil compiler provided with PSoC Creator? "Compiler code size exceeded" " RESTRICTED VERSION WITH 0800H BYTE CODE SIZE LIMIT " " INCORRECT LICENSE ID CODE (LIC) IN ’TOOLS.INI’"	Not yet rated	03/03/11
Implementing Multiply and Accumulate(MAC) function in PSoC 3/5's DFB Can I use DFB for 24x24 MAC operations?	(2/5) by 1 user	03/03/11
Maximum order of FIR filter using PSoC 3/5's DFB What is the maximum order of the FIR filter that I can implement with the PSoC 3/5's Digital Filter Block (DFB)?	Not yet rated	03/03/11
Calculating the maximum input signal frequency of Del Sig ADC from the configuration parameters or vice versa in PSoC 3/5? How to calculate the maximum input signal frequency for Delta-Sigma ADC from the configuration parameters in PSoC 3/5?	Not yet rated	03/03/11
Efficiency of Boost Regulator in PSoC3 What is the efficiency of the Boost Converter when the input voltage is in the range of 0.5V to 1.8V?	Not yet rated	03/03/11
Controlling PSoC 3/5 GPIO in firmware How do I control a PSoC 3/5 GPIO by CPU in firmware?	Not yet rated	03/03/11
PSoC Creator free compiler restrictions What are the restrictions on the 8051 compiler that comes with PSoC Creator?	Not yet rated	03/03/11
Executing code while writing to EEPROM in PSoC 3/5 Can we execute code while writing to EEPROM in PSoC 3/5?	Not yet rated	03/03/11
Calling component APIs from ISR What is the recommended method for calling component APIs from interrupt service routines in PSoC 3?	Not yet rated	03/03/11
PSoC3 process node and Flash programming method What are the process parameters for the PSoC3 and what is the programming method for Flash (Hot electron injection or Fowler-Nordheim) ?	Not yet rated	03/03/11
Selecting Drive mode of I/O pins in PSoC Creator How do I select Drives modes for my I/O pins in PSoC Creator?	Not yet rated	03/03/11
Bringing out internal Reference to an External pin in PSoC 3/5 How do I route the internal reference to an external pin to bias my external circuit in PSoC 3/5?	Not yet rated	03/03/11
PSoC3 Del Sig ADC produces full scale value when inputs are shorted When the PSoC3 Del Sig ADC is configured in singled ended mode, why does the ADC produce near full scale value when I short the ADC inputs?	Not yet rated	03/02/11
difference between standby mode and dataretention mode? What is the difference between standby mode and data retention mode?	Not yet rated	03/02/11
Removing clock to the SRAM? Are there any concerns if I remove the clock to the sram once all the operations of the sram are completed?	Not yet rated	03/02/11
Software store and toggling of OE signal for Simtek and Cypress NVSRAM's How does the Software store work for Simtek parts? Can the chip clock the address without OE signal? Is the behavior different for Simtek and Cypress NVSRAM's?	Not yet rated	03/02/11
Power up sequence of an SRAM? Is there a power up for ZBT/NoBL and Standard Sync SRAM? Eg. Vdd first, followed by Vddq as in QDR SRAMs.	Not yet rated	03/01/11
Address pins assignments in SRAMs What address bit is associated with each Address pin in SRAMs ? Why address pins are not numbered?	Not yet rated	03/01/11

Results 2051 - 2100 of 2323

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