|
Title
|
Customer Rating
|
Updated
|
Changes Made to STK14C88 When it was Taken Over From Simtek
Is there any technical change made to the device STK14C88 when it was taken over from Simtek (aside from the number and manufacturer)? Also, is the die still produced in the same foundry or has it been moved now that it's a Cypress device?
|
Not yet rated
|
09/01/11 |
Data Valid Window Calculation
How do you calculate the Data Valid Window in QDRII SRAMs?
|
Not yet rated
|
09/01/11 |
Load Capacitance of Tri-State Data bus of many SRAMs connected together
What will be the load capacitance of a Tri-State Data bus when more than one SRAM busses are connected together?
|
Not yet rated
|
09/01/11 |
Back to Back Write in Synchronous SRAMs
Can /WE be kept LOW during back to back write or does it has to be toggle on every write on this back to back transaction in Synchronous SRAMs?
|
Not yet rated
|
09/01/11 |
IO pins usage when a Synchronous SRAM in interfaced with an FPGA
When CY7C1380D interfaced with an FPGA and is/are running short on IO pins. Can we do the following?
Can we apply burst addresses out of the FPGA with the auto increment burst operation?
Can we use nBWa,b,c,d with nBWE permanently on GND to mask writes?
Can we have nADV, nADSP and nADSC permanently asserted?
|
Not yet rated
|
09/01/11 |
Connect the ADV/nLD- and the BW- pins to a static level
Is it possible to connect the ADV/nLD- and the BW- pins to a static level? Do I need them to toggle during normal operation?
|
Not yet rated
|
09/01/11 |
Are the echo clocks CQ/CQ# differential clocks?
Are the echo clocks CQ/CQ# differential clocks?
|
Not yet rated
|
09/01/11 |
Input Jitter in Synchronous SRAMs
Does Synchronous SRAM like when interfaced with an FPGA sensible to cycle jitter OR does it accept everything as long as timing requirements are met?
|
Not yet rated
|
09/01/11 |
Echo Clocks Usage QDR and DDR Synchronous SRAM families
What is the Echo clock?
|
(5/5) by 1
user
|
09/01/11 |
QVLD pin usage
Explain the use of QVLD signal in QDR-II+/DDR-II+ SRAM's?
|
Not yet rated
|
09/01/11 |
Power up sequence and the use of DOFF# in QDRII/II+ and DDRII/II+ SRAMs
What is the power up and initialization sequence to be followed for the QDRII/II+ and DDRII/II+ devices?
|
Not yet rated
|
09/01/11 |
Events causing Soft Error Rate (SER) in Sync SRAMs
What are the various events causing Soft Error Rate (SER) in Sync SRAMs?
|
Not yet rated
|
09/01/11 |
parameters affected by operating QDR-II at lower than rated maximum speed
Which timing parameters get afftected when QDR-II device is run at speed lower than maximum rated speed ?
|
Not yet rated
|
09/01/11 |
QDRII/DDRII/QDRII+/DDRII+ clocking
How should be QDRII/DDRII/QDRII+/DDRII+ clocking ?
|
Not yet rated
|
09/01/11 |
The Difference between QDRII(or QDR2) and QDRII+ (or QDR2+ )
1) What is the difference between QDR II(or QDR2) and QDR II+(or QDR2+) ?
2) Can QDR II+(or QDR2+) replace QDR II(or QDR2) ?
|
Not yet rated
|
09/01/11 |
Part Number Decoder for Standard Sync SRAMs
Where can I find Part Number Decoder for Standard Sync SRAMs?
|
(5/5) by 1
user
|
09/01/11 |
Heder pins on the EZ USB development board
Why are there header pins on the EZ-USB AN21xx development board and what purpose do they serve?
|
Not yet rated
|
08/31/11 |
Debug monitor
Which UART is used in the EZ-USB development Kit for the debug monitor? Where can I find information regarding the different versions of the monitor.
|
Not yet rated
|
08/31/11 |
After installing the Cypress driver, two Stop/Eject tray icons when USB device plugged in
After I installed the Cypress Mass Storage driver, I started seeing two Stop/Eject tray icons whenever I have a USB device plugged in. Is that normal?
|
Not yet rated
|
08/29/11 |
Using same CyUSB.sys across Windows OSes
When I use CyUSB.sys meant for one Windows OS in a different Windows OS (eg:- XP version in Vista) I don’t see any problem. Is this kind of usage recommended? If not, Why?
|
Not yet rated
|
08/29/11 |
SLCS line of EZ-USB (FX1/FX2/FX2LP)
Does SLCS# signal matter for Slave FIFO Sync Read and Slave FIFO Sync Write processes? If yes, what are the setup and hold time requirements to be met by an external IFCLK rising edge?
|
Not yet rated
|
08/29/11 |
Using CTL and RDY Pins as Output and Input
Can I use CTL and RDY pins of EZ-USB (FX/FX1/FX2/FX2LP) as output and input respectively in custom applications like driving an LED or reading a button?
|
Not yet rated
|
08/29/11 |
The errata sheet(s) for EZ-USB Series 2100
Where can I find the errata sheet(s) for EZ-USB Series 2100?
|
Not yet rated
|
08/29/11 |
Firmware works on EZ-USB (AN21xx/FX/FX1/FX2/FX2LP) Development Board only
My firmware will not run in my board, but does work in the Cypress development board CY368x. What could be wrong?
|
Not yet rated
|
08/29/11 |
The schematic of the development board CY3671
Where can I get the schematic of the development board CY3671?
|
Not yet rated
|
08/29/11 |
CyUSB.sys general purpose driver
Where to find the new CyUsb.sys USB General Purpose Driver?
|
Not yet rated
|
08/29/11 |
Where''s a soft copy of the EZ-USB Series 2100 Getting Started Guide?
|
Not yet rated
|
08/29/11 |
Getting Software Development Tools For the Family of USB 2.0 Products
How can one obtain the Software development tools for the family of Cypres USB products?
|
Not yet rated
|
08/29/11 |
Configure an I/O port for an output.
Do you have an example that shows how to configure an I/O port for an output.
|
Not yet rated
|
08/29/11 |
EZ-USB Series 2100 Development Board schematic (pdf and Orcad files)
Where can I find the EZ-USB Series 2100 Development Board schematic (pdf and Orcad files)?
|
Not yet rated
|
08/29/11 |
CyConsole Re-connect Device control
In Windows 2000, pressing the Re-connect Device control on CyConsole, the device is removed from CyConsole but does not return. Windows Device Manager still shows the device as functioning but CyConsole does not see the device again until device power is cycled. Does the Re-connect Device control work?
|
Not yet rated
|
08/29/11 |
How can we get a VID and PID for our current and future developments?
|
Not yet rated
|
08/29/11 |
Using serial port to send and receive data from the EZ-USB using the hyper-terminal.
Do you have any examples on using the SIO-0 to send and receive data from the EZ-USB using the hyper-terminal.
|
Not yet rated
|
08/29/11 |
Issue with Archos Jukebox on Mac OS X
My Archos Jukebox takes a very long time to load on Mac OS X. I downloaded the latest drivers, but it didn't help. What could be the problem
|
Not yet rated
|
08/29/11 |
Do I need to purchase the full version of Keil uVision2 or is the one included with your EZ-USB development kit adequate?
Do I need to purchase the full version of Keil uVision2 or is the one included with your EZ-USB development kit adequate?
|
Not yet rated
|
08/29/11 |
What are the crystal requirements for the CY7C65620 / CY7C65630 / CY7C65640B hubs?
What are the crystal requirements for the CY7C65620 / CY7C65630 / CY7C65640B hubs?
|
Not yet rated
|
08/29/11 |
How should the RESET pin be configurated on the CY7C65640B/30/20?
How should the RESET pin be configurated on the CY7C65640B/30/20?
|
Not yet rated
|
08/29/11 |
Can I use the default VID/PID and default descriptors to avoid the need for an external EEPROM ?
Can I use the default VID/PID and default descriptors to avoid the need for an external EEPROM ?
|
Not yet rated
|
08/29/11 |
Replacement part for CY7C65630-56LFXC
What is the replacement part for CY7C65630-56LFXC?
|
Not yet rated
|
08/29/11 |
How should the unused port (D+ and D-) be configured in the CY7C65640B/30/20?
How should the unused port (D+ and D-) be configured in the CY7C65640B/30/20?
|
Not yet rated
|
08/29/11 |
Generating accurate High Frequency Clock for PSoC 3
How can I generate most accurate clock at high frequencies in PSoC 3?
|
Not yet rated
|
08/24/11 |
Does Cypress West Bridge Controller Antioch and Astoria support SDHC?
|
Not yet rated
|
08/23/11 |
VCAP charging current
What is the VCAP charging current?
|
Not yet rated
|
08/23/11 |
Page crossing detected and XPAGEOFF enabled
When compiling the firmware with the USB M8 Series Hi Lo Programmers and the following message occurred:
"warning : Page crossing detected and XPAGEOFF enabled." Why?
|
Not yet rated
|
08/12/11 |
Hi-Lo programmer
When programming with a Hi-Lo programmer a message 'Error at 000000!' occurred What is the reason of this error?
|
Not yet rated
|
08/12/11 |
"Error Identification on hardware !" message while programming M8 with Hi-Lo programmer
While programming the M8 with a Hi-Lo programmer, the 'Error Identification on hardware !' message is seen. Why?
|
Not yet rated
|
08/12/11 |
Operating systems are supported by the CY3649 Hilo Programmer?
What Operating Systems are supported by the CY3649 Hi-Lo Programmer?
|
Not yet rated
|
08/12/11 |
Security feature of M8 Programmers
Using Hi-Lo system's All-11 programmer, the programmer has "Lock Bit" option for code protection. Would you explain briefly how the lock bit of CY7C63001a works and how secure it is?
|
Not yet rated
|
08/12/11 |
CY3649
What is the CY3649?
|
Not yet rated
|
08/12/11 |
Frameworks for encore CY7C637xx series
Do you have assembly frameworks for the encore CY7C637xx family?
|
Not yet rated
|
08/12/11 |