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Title
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Customer Rating
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Updated
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CapSense latched output in CapSense Express devices
Is there any method to latch the CapSense input status which can be read later on?
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Not yet rated
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04/01/11 |
Simtek obsolete part reference for STK10C48
What is the drop in replacement for Simtek STK10C48 series of parts?
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Not yet rated
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03/31/11 |
Initial data at power-up for the SRAMs
If you power up the SRAM's, and do not write to any of the locations, is there an inherent predisposition for the registers to settle at either 00,FF, etc.?
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Not yet rated
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03/30/11 |
The drive strength of the output drivers of the QDR-II SRAM
How to control the drive strength of the output drivers of the QDR-II SRAM?
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Not yet rated
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03/30/11 |
Disabling the echo clock
Is it possible to disable echo clock?
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Not yet rated
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03/30/11 |
Use of second chip enable on the SRAM parts ?
Does the second chip enable on the SRAM pars provide any additional functionality?
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Not yet rated
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03/30/11 |
Memory controller for the QDR and QDR-II
Can I have the same memory controller for both the QDR" and QDR"-II?
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Not yet rated
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03/30/11 |
ZZ pin in Sync SRAM
Is ZZ pin internally pulled up/down? Can it be left floating?
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Not yet rated
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03/30/11 |
Consecutive read and write in Pipeline SRAM
How to do consecutive read and write in pipeline SRAM?
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Not yet rated
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03/30/11 |
Minimum voltage required at VCAP pin to complete AutoStore?
What is the minimum voltage required at VCAP pin to complete AutoStore?
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Not yet rated
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03/30/11 |
VCAP pin connection when not using storage capacitor, VCAP on NvSRAM
If AutoStore is not required, what should be done with the VCAP pin?
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Not yet rated
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03/30/11 |
HOLD* signal in SPI NVSRAM
Should any line (Serial Input-SI, Serial Output-SO or Clock-SCK) be pulled LOW when HOLD* (Active Low) pin is asserted in Serial NVSRAMs?
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Not yet rated
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03/30/11 |
Using two 16-bit nvSRAMs in parallel in order to interface with a 32-bit microprocessor data bus
Is it acceptable to use two 16-bit parallel nvSRAM devices in parallel in order to interface with a 32-bit microprocessor data bus?
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Not yet rated
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03/30/11 |
nvSRAM SEL and SER Data
Explain SEL and SER for Cypress NVSRAM's
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Not yet rated
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03/30/11 |
Time taken for Software Store and Hardware Store
What is the difference in time taken for Software and Hardware Store?
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Not yet rated
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03/30/11 |
Difference between CIO and SIO
When I select DDR-II family of SRAM's,I can choose between CIO and SIO. What is difference?
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Not yet rated
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03/30/11 |
How to interpret the ESD numbers 'ESD=2200V ESD=500V'
How to interpret the ESD numbers "ESD=2200V ESD=500V" given in QTP report?
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Not yet rated
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03/30/11 |
Difference between parity bits and regular data I/O lines
Some of the cypress synchronous devices have parity pins. Are these same as regular I/O pins?
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Not yet rated
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03/30/11 |
Comparator Bus as Clock Input to Timer
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Not yet rated
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03/30/11 |
Code Size of a PSoC Project
How do I find the code size of my PSoC Project?
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Not yet rated
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03/30/11 |
DAC using CY8C21x23
Is is possible to have a 6 bit or 8 bit DAC in CY8C21x23 device?
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Not yet rated
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03/30/11 |
Frequency Limits on Low-Pass Filter and BandPass Filter User Modules
What are the upper and lower limits of input signal frequency of the low-pass filter and the band-pass filter user modules, at all the different power levels?
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(4/5) by 1
user
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03/30/11 |
Analog Reference Power setting in PSoC designer
When should I set the reference power to REF HIGH?
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(5/5) by 1
user
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03/30/11 |
"Invalid characters" error message in PSoC Creator
When I try to open a PSoC Creator Project, I get the error:
Unable to open the workspace "C:\Documents and Settings\Administrator\桌面\...\psoccreatorproject.cywrk": (Invalid character(s): 桌面)
What is the cause and how do I fix this?
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(5/5) by 1
user
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03/29/11 |
Serial Wire Debug (SWD) using USB I/O pins in PSoC 3/5
How can I do Serial Wire Debug using USB I/O pins?
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(5/5) by 1
user
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03/29/11 |
Assigning I2C SDA and SCL pins to any GPIO in PSoC 3/5
When I try to route the I2C SCL and SDA pins to any GPIO, I get the following error:
IO "I2C_SCL(0)" cannot be placed into "PX[x]" because the pin does not support the features required by the IO. (App=cydsfit)
What is the reason for this error and how can this be fixed?
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Not yet rated
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03/29/11 |
Programmable PLL frequencies in PSoC 3
Can PSoC 3 PLL block be configured to desired output frequencies?
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Not yet rated
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03/29/11 |
Interrupt latency calculation for PSoC 3
What is the latency for processing an interrupt in PSoC 3?
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Not yet rated
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03/29/11 |
Minimum and Maximum frequency limits of various clock sources in PSoC 3
What are the minimum and maximum frequency limits of various clock sources in PSoC 3?
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Not yet rated
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03/29/11 |
Difference between the PWM modes "one shot with a single trigger" and "one shot with multi trigger"
What is the difference between the PWM modes "one shot with a single trigger" and "one shot with multi trigger"?
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Not yet rated
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03/29/11 |
Measuring Differential Signals in PSoC 3/5
Is it possible to measure differential input signals in PSoC 3/5?
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Not yet rated
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03/29/11 |
Parameters determining the minimum and maximum sample rate of PSoC 3/5 Del Sig ADC
What determines the minimum and maximum sample rate of PSoC 3/5 Del Sig ADC?
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Not yet rated
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03/29/11 |
Timing details of DMA transfer in PSoC 3/5
What is the time taken for DMA to transfer N bytes of data on a trigger in PSoC 3/5?
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Not yet rated
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03/29/11 |
Config0 byte in I2C EEPROM showing bit 2 setting
Why do some examples for the Config0 byte in I2C EEPROM show setting bit 2?
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Not yet rated
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03/29/11 |
Dynamic Switching of the FX2 CPU Clock.
Is it possible to change clock frequency while the chip is running?
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(5/5) by 1
user
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03/29/11 |
8051 Core Type in FX2LP
What sort of 8051 core is in the Cypress EZ-USB parts? Is it a Dallas core?
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(4/5) by 2
users
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03/29/11 |
Address Valid Time When Using AUTOPTR1/2 for External Data Memory Access
How can we address external memory when using the AUTPOPTR1 or AUTOPTR2 in FX2/FX2LP 8051?
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Not yet rated
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03/29/11 |
Device stall an IN/OUT endpoint
In general, when should a Device stall an IN/OUT endpoint?
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Not yet rated
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03/29/11 |
Using FX2/FX2LP can I pull up SDA and SCL line to 5V power supply?
I would like to use an FX2/FX2LP with an I2C slave device operating at 5V. Can I pull up SDA and SCL line to 5V power supply?
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Not yet rated
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03/29/11 |
SetFeature request in SX2
Who handles the SetFeature request in SX2? How does the SX2 support the test modes for electrical compliance testing as defined in section 7.1.20 of the USB 2.0 specification?
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(3/5) by 1
user
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03/29/11 |
Where Can I Find an Example for I2C Operations (FX2LP)?
Where I can get any example for I2C operations of FX2LP?
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Not yet rated
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03/29/11 |
Multiple Sources driving the DAC Bus in PSoC 3/5
I would like to drive two independent IDACs from two different data buses. How can I do this?
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Not yet rated
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03/29/11 |
Files in Cypress' Generic USB Mass Storage Class Driver Installer"
How to use several "Generic Mass storage class drivers " available from cypress for ATA/ATAPI compatible products like ISD-200,ISD-300,ISD-300LP,AT2,AT2LP ?
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Not yet rated
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03/29/11 |
Reading a verilog component implemented in PSoC 3/5 PLDs by CPU/DMA
How can CPU/DMA read from a verilog component implemented in PLDs of UDB Blocks.
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(1/5) by 1
user
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03/29/11 |
16 bit mode for the SX2 device
f the CY7C68001 is set to 16 bits mode and an odd number of bytes is received over USB, what will be the sequence to read from the FIFO in the CY7C68001?
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(4/5) by 1
user
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03/29/11 |
AMux cascaded method for PSoC 3/5
Is AMux cascaded possible in PSoC Creator for PSoC 3/5 devices?
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Not yet rated
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03/29/11 |
Access Flash Rom(1GBx8bit) using the CY7C68023
Is it possible to access Flash Rom(1GB,8bit) using the CY7C68023?
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Not yet rated
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03/29/11 |
USB Mass Storage Specification requires a unique serial number for all devices
Why does a USB mass storage device need a unique serial number?
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Not yet rated
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03/29/11 |
Can slider segments be used as capsense buttons?
Can I use the 7 segments slider on first touch kit as 7 different switches?
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Not yet rated
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03/28/11 |
Hardware Contro of Analog Multiplexer in PSoC1
Can the analog multiplexer be controlled by the output of digital block without intervention of the software?
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Not yet rated
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03/28/11 |