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Title
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Customer Rating
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Updated
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Reset Problems When Re-programming the 24LC64 EEPROM on the FX2 - KBA83436
Question: When an iic firmware image is created with the command hex2bix -i -o test.iic test.hex, the firmware does not get loaded and the device does not enumerate with the new descriptors as expected. What is the reason?
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Not yet rated
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01/31/13 |
Sensitivity and Capacitance Range for the CY8C21x34 CSD - KBA82522
Question: How do you calculate the sensitivity and capacitance range for a capacitive touch sensing application designed using the CY8C21x34 CapSense® CSD?
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Not yet rated
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01/31/13 |
Calculating the Resolution for CY8C21x34 CapSense CSD - KBA82521
Question: How do you calculate the resolution of a capacitive touch sensing application designed using the CY8C21x34 CapSense® CSD?
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Not yet rated
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01/31/13 |
Tools for Developing Applications with CapSense Controllers - KBA83347
Question: What tools do I need to develop capacitive touch sensing applications with CapSense controllers?
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01/25/13 |
Comparison of Resource Utilization Between PSoC® 3, PSoC 5 and PSoC 5LP UDBs and Other Vendor CPLDs - KBA85325
Question: How do PSoC UDBs compare with other vendor CPLDs for logic utilization of common functions?
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Not yet rated
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01/18/13 |
How to Interface FPGA to Ez-USB® FX3™ DVK (Rev 3) - KBA85373
Question: How to interface FPGA to FX3 DVK (Rev 3) Boards?
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Not yet rated
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01/10/13 |
Missing Watchdog Enable Parameter in CY8C29xxx Devices - KBA85221
Question: I created a new project with one of the CY8C29xxx family devices in PSoC Designer™ 5.3. However, I cannot find the Watchdog Enable parameter in the Global Resources Window. Is there a workaround for this?
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Not yet rated
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01/08/13 |
Using the printf Function in PSoC® 3 - KBA83472
Question: How do I use the printf function in stdio.h to send data to UART?
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Not yet rated
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01/08/13 |
Software Reset in Normal Mode for CapSense Express - KBA82924
Question: Can you do a software reset on a CapSense Express device in normal mode?
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Not yet rated
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01/08/13 |
Difference between CY8C20x34 and CY8C20x24 - KBA82927
Question: What is the difference between the CY8C20x34 and CY8C20x24 family of devices?
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(4/5) by 1
user
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01/08/13 |
Using CSD2X UM with CY8C22X45/CY8C21X45 - KBA84272
Question: When I create a new project with the CY8C22x45 or CY8C21x45 family of devices and place the CSD2X User Module (UM) version 1.0, the configuration wizard is empty. What is the workaround for this?
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Not yet rated
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01/07/13 |
Clock Frequency of I2C Slave in CapSense Express Devices - KBA82517
Question:What is the I2C slave clock frequency for CapSense® Express devices?
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Not yet rated
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01/07/13 |
CY8CKIT-050 PSoC® 5 Development Kit MHz Crystal- KBA82852
Question: Why do USB/UART-related projects using CY8CKIT-050 not work when I update to PSoC Creator 2.0 or later version?
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Not yet rated
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01/03/13 |
CY2291/CY2292 Frequency Ranges
What are the minimum and maximum frequency ranges for the CY2291 and CY2292 for 3.3V and 5V operation?
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Not yet rated
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01/02/13 |
Add P1[4] for Rb in CY8C21234B SmartSense™ Version 1.30 - KBA83339
Question:Why can I not connect the Rb resistor to a pin other than P1[1], in CY8C21234B SmartSense device?
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Not yet rated
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12/27/12 |
Downloading the firmware to FX2 chip.
What are my options of downloading the firmware to the chip.
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Not yet rated
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12/21/12 |
Maximum throughput using FX3 - KBA84084
Question:What is the maximum throughput that can be obtained using FX3?
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Not yet rated
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12/20/12 |
Maximum throughput using Bulk Source Sink Example - KBA84083
Question: How to obtain maximum throughput using bulk source sink example provided with FX3 SDK?
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Not yet rated
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12/20/12 |
Building Custom .nx2 File - KBA83970
Question: How do I build a new .nx2 file?
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(2/5) by 1
user
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12/20/12 |
Utilization of the Unused GPIF Control Lines - KBA83964
Question: Does triggering of the GPIF change the state of the unused control lines?
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Not yet rated
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12/20/12 |
FX2LP does not enumerate for Firmware (code+xdata) of Size Greater than 16 K - KBA83973
Question: FX2LP does not enumerate when firmware (code+xdata) of size greater than 16 K is downloaded. Why is this happening?
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Not yet rated
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12/20/12 |
Multiple FX2LP Devices Connected to Host - KBA83974
Question: How can the host distinguish between and communicate with multiple FX2LP devices connected if each of the devices have the same VID/PID?
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Not yet rated
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12/20/12 |
PSoC® 3, PSoC 5, and PSoC 5LP Breakpoints and Watchpoints - KBA84801
Question: How many breakpoints and watchpoints are supported in PSoC® Creator™ for PSoC 3, PSoC 5, and PSoC 5LP?
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12/19/12 |
Documentation and Training for PSoC® Creator™ Component Development - KBA80958
Question: What documents and training are available for PSoC® Creator™ component development?
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12/19/12 |
Using the PSoC 5 MHz ECO on CY8CKIT-050 and CY8CKIT-010 - KBA84757
Question: How should the PSoC 5 kit hardware and firmware be configured to use the MHz ECO?
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12/10/12 |
Function Pointer - KBA84041
Question: How do I declare pointer to functions?
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Not yet rated
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12/07/12 |
VDAC8 Output Voltage in PSoC® 3 and PSoC 5 - KBA84732
Question: The VDAC8 output does not go beyond 2.4 V even when the VDAC8 range is set to 4.080 V in PSoC® 3 and PSoC 5. What is the solution for this?
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Not yet rated
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12/07/12 |
Obsolete 48-pin SSOP PSoC® 5 Devices - KBA84779
Question: Do the PSoC® 5 and PSoC 5LP device families support 48-pin SSOP packages?
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(1/5) by 1
user
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12/07/12 |
PSoC® 5 Pin Packages - KBA84775
Question: Where can I find the available PSoC® 5 and PSoC 5LP pin packages?
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Not yet rated
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12/07/12 |
PSoC® Creator™ Version or Build Number in the .rpt File - KBA84777
Question: Can I find the PSoC® Creator™ version or build number from the .rpt file of a compiled project?
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Not yet rated
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12/07/12 |
PSoC® 3 and PSoC 5 BSDL Files - KBA84780
Question: Where are the JTAG BSDL files for PSoC® 3 and PSoC 5LP devices located?
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Not yet rated
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12/07/12 |
STA Warnings IN PSoC® 3 ES3/Production Release Silicons- KBA 84739
Question: Why do I get Static Timing Analysis (STA) warnings in my design for PSoC® 3 ES3 and Production release silicons and PSoC 5LP? I do not get these warnings if I port the project to PSoC 3 ES2 or PSoC 5.
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Not yet rated
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12/06/12 |
Delay between Bytes when SPIM_PutArray API is used - KBA82854
Question: Why is there a delay between successive bytes when the SPIM_PutArray API is used?
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12/06/12 |
PSoC® 3, PSoC 5, and PSoC 5LP AN Project File Naming Convention and Use – KBA84803
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12/06/12 |
PSoC® 5 and PSoC 5LP Flash Memory Organisation and Array ID Parameter - KBA 84740
Question: How is flash memory organized in PSoC® 5 and PSoC 5LP? How do we choose the array ID parameter for the CyWriteRowData API?
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Not yet rated
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12/06/12 |
Supported Bootloaders in PSoC® 3, PSoC 5, and PSoC 5LP Devices - KBA 84744
Question: Which bootloaders do PSoC® 3, PSoC 5, and PSoC 5LP devices support in PSoC Creator?
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(5/5) by 1
user
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12/04/12 |
Selecting the Desired PSoC® 3 or PSoC 5 Part Number for a Project in PSoC Creator™ - KBA84387
Question: How do you select the PSoC 3 or PSoC 5 part number you need for a project in PSoC Creator?
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Not yet rated
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12/03/12 |
Types of Memories Supported by PSoC® 3 or PSoC 5 EMIF - KBA83241
Question: What type of memories will be supported by EMIF component?
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Not yet rated
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11/28/12 |
Antenna Type and Location for WUSB-NL - KBA83398
Question:What should be the antenna type and location for WUSB-NL?
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Not yet rated
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11/27/12 |
How to Configure the CyFi Protocol Data Rate in CY3271 Kit - KBA84673
Question: How do I configure the CyFi protocol data rate in the CY3271 Kit?
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Not yet rated
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11/22/12 |
USB Selective Suspend Compliance Test - KBA84678
Question: How to ensure that the enCoRe MCU based USB devices pass the USB selective suspend compliance test?
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Not yet rated
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11/21/12 |
Reference Schematic Design Recommendation for QDR-DDR II/II+/Xtreme SRAMs - KBA84386
Question: How to get a recommended reference schematic design for QDR-DDR II/II+/Xtreme products?
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Not yet rated
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11/20/12 |
Input Jitter Requirements for 65 nm QDRII/II+/DDRII/II+ Device Family - KBA84380
Question:What are the input jitter requirements for 65 nm QDRII/II+/DDRII/II+ device family?
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Not yet rated
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11/20/12 |
How to Resolve QDR-DDR II/II+/Xtreme Verilog Model Simulation Error Using Synopsys VCS - KBA84385
Question:Why Synopsys VCS gives incorrect simulation result with QDR-DDR II/II+/Xtreme verilog models?
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Not yet rated
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11/20/12 |
Programming PSoC® 3 First Touch Starter Kit CY8CKIT-003 - KBA83430
Question: Do I need to purchase a MiniProg3 to program the PSoC 3 First Touch Starter Kit CY8CKIT-003?
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Not yet rated
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11/20/12 |
ADC Performance with External Reference in PSoC® 3 or PSoC 5 – KBA83438
Question: Does an external reference improve the ADC performance?
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Not yet rated
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11/19/12 |
Connections on Vcca and Vccd Pins of PSoC® 3 and PSoC 5 - KBA83234
Question: Can the Vccd and Vcca pin on PSoC 3 and PSoC 5 be tied to an external voltage?
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Not yet rated
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11/19/12 |
Driving an External Load using VDAC in PSoC® 3 or PSoC 5 - KBA83238
Question: How do I directly drive an external circuit using VDAC in PSoC 3 or PSoC 5?
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(5/5) by 1
user
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11/19/12 |
Unused BWSb Pin Termination for ODT Enabled QDR-II+/DDR-II+ SRAM Devices - KBA82774
Question: Explain termination options for unused BWS pins.
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Not yet rated
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11/07/12 |
Termination of Input pins in Sync SRAMs - KBA82779
Question: Do all input pins need pull up resistors for termination ?
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Not yet rated
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11/07/12 |