|
Title
|
Customer Rating
|
Updated
|
Cypress Parts Baking Condition Information
Do Cypress parts require baking? If so, what are the conditions?
|
Not yet rated
|
05/24/12 |
Country of Origin (COO) Information
Where can I find the Country of Origin (COO) of a Cypress product?
|
Not yet rated
|
05/24/12 |
Recommended Reflow for Cypress Parts Information
What is Cypress’s Parts Recommended Reflow?
|
Not yet rated
|
04/20/12 |
Cypress' Parts Shelf Life Condition Information
What is Cypress’s Parts Shelf Life condition?
|
Not yet rated
|
04/19/12 |
Is PAL22V10B a valid Cypress device?
Is PAL22V10B a valid Cypress device?
|
Not yet rated
|
04/18/12 |
Windows7 driver support for CYUSBISR programming cable.
Does the latest ISR 4.0.1 programming software have driver support for Windows7?
|
Not yet rated
|
04/18/12 |
installing USBisr on Windows XP x64
I have not been able to install USBisr on Windows XP x64. Is there a different driver for 64-bit XP?
|
Not yet rated
|
01/26/12 |
Difference between SVF and STAPL file formats
What is the difference between SVF and STAPL file formats and how should one select between the two?
|
Not yet rated
|
01/26/12 |
design software for CY7C343 devices
What is the design software that supports CY7C343 devices?
|
Not yet rated
|
01/26/12 |
Programming CY7C374U
How was CY7C374U device programmed.How is it different from CY7C374i
|
Not yet rated
|
01/26/12 |
BSDL model for CY37128VP84-83YMB
Is there a BSDL model available for CY37128VP84-83YMB?
|
Not yet rated
|
01/26/12 |
Data retention life for CY7C343B-25HC
What is the data retention life for CY7C343B-25HC?
|
Not yet rated
|
01/26/12 |
Program & Verify for svf file
Can I select either 'program only' or 'verify only' for generating svf file for a CY37032VP44-100A when using ISR 4.0?
|
Not yet rated
|
01/26/12 |
Reading back Jedec file
How to read back the Jedec file from the CPLD?
|
Not yet rated
|
01/26/12 |
Programming Flash370i family of devices
How to Programming Flash370i family of devices?
|
Not yet rated
|
01/26/12 |
CPLD checksum
What is meant by CPLD checksum and what does a checksum error indicate?
|
Not yet rated
|
01/26/12 |
SPLDs for New Designs
If I am designing a new design using an SPLD, which one should I use?
|
Not yet rated
|
01/01/12 |
Use of the CEO/A2 in a Single Chip Configuration
What do I do with the CEO/A2 pin if I only use one EEPROM?
|
Not yet rated
|
01/01/12 |
Functionality Problem with Ultra37000V CPLD Despite Passing Simulation
1. A pin gets pulled low even though the simulation shows it correct?
2. I get daisy chain errors, why?
|
Not yet rated
|
01/01/12 |
Hysteresis on Input of Cypress Quantum38K CPLDs
Do Quantum38K CPLDs have hysteresis on the inputs?
|
Not yet rated
|
01/01/12 |
Are military parts vacuum sealed?
Are military parts vacuum sealed?
|
Not yet rated
|
01/01/12 |
Issues with Pins Locked to a Certain Level Despite Simulation
1.I have a pin that is unresponsive despite all attempts to drive the signal?
2.The functional simulation shows that it should work, but it doesn't. Help?
|
Not yet rated
|
01/01/12 |
Why tS > tSPT for Ultra 37000 CPLDs
Why is tS > tSPT?
|
Not yet rated
|
01/01/12 |
Thermal Information for Cypress Flash370i CPLDs
1. What is the Theta JA value for the 37xi?
2. What is the Theta JC value for the 37xi?
|
Not yet rated
|
01/01/12 |
Differences Between Revision A and Revision B of Ultra 37000 CPLDs
Ultra37000, Ultra 37k, 37k, 37000, 37032, 37064, 37128, 37192, 37256, 37384, 37512 revision, silicon, rev, die, change, update
|
Not yet rated
|
01/01/12 |
ISR Failures during Flash 370 and Flash 370i Programming
Why is ISR failing programming?
|
Not yet rated
|
01/01/12 |
Boundary Scan on Flash370 and Flash370i CPLDs
Can I perform a boundary scan on the Flash 370 and Flash 370i devices?
|
Not yet rated
|
01/01/12 |
Transparent Latches in Ultra 37000 CPLDs
Can I implement a transparent latch in an Ultra 37000 device?
|
Not yet rated
|
01/01/12 |
Security Bit in the Ultra 37000
1. What does the security bit do?
2. How do I set the security bit?
3. Can I recover a design from a device programmed with the security bit?
|
Not yet rated
|
01/01/12 |
Do MAX340 EPLDs Have Internal Oscillators?
Do MAX340 EPLDs Have Internal Oscillators?
|
Not yet rated
|
01/01/12 |
In Aldec-HDL is there any way to name remerged signals other than VBUS#
In Aldec-HDL is there any way to name remerged signals other than VBUS#?
|
Not yet rated
|
01/01/12 |
Creating Bi-Directional Signals in Warp
1.How do I create a bidirectional signal in Warp?
2.How do I correctly simulate a bidirectional signal?
|
Not yet rated
|
01/01/12 |
Is there an application to convert a *.stp or *.hex file into a C code array?
Is there an application to convert a *.stp or *.hex file into a C code array?
|
Not yet rated
|
01/01/12 |
Registering Warp
1.How do I register Warp?
2.Where is the online registry area?
|
Not yet rated
|
01/01/12 |
Why does the ISR software not show a particular revision of Delta 39K devices?
Why does the ISR software not show a particular revision of Delta 39K devices?
|
Not yet rated
|
01/01/12 |
BSDL model of CY37032P44 device
Where can I find BSDL model of CY37032P44 device.
|
Not yet rated
|
01/01/12 |
Who should I get in touch with to obtain pricing and availability information?
Who should I get in touch with to obtain pricing and availability information?
|
Not yet rated
|
12/30/11 |
Avoiding overflow of RX FIFO in the CY7C924ADX and CY7C9689A.
How to avoid RX FIFO overflow in the CY7C924ADX and CY7C9689A?
|
Not yet rated
|
12/07/11 |
Characteristics and considerations for HOTLink jitter
What are the characteristics and considerations for HOTLink jitter?
|
Not yet rated
|
12/07/11 |
Data stream is always valid when RVS is LOW
Is it guaranteed that the data stream is always valid when RVS is LOW?
|
Not yet rated
|
12/07/11 |
Cannot connect to the PLC device error in the PLC Control Panel
What should I check for when the PLC Control Panel cannot connect to the PLC device?
|
Not yet rated
|
12/05/11 |
PLT and CYFISNP user modules resource conflict
I can’t place the PLT and CYFISNP user modules in the same configuration. I receive a message “Unable to place CYFISNP User Module because of current resource allocation”. How do I use these two modules together?
|
Not yet rated
|
12/05/11 |
Band in Use timeout during transmission on the powerline
What should I do if the BIU continuously times out while trying to transmit a packet over the powerline?
|
Not yet rated
|
12/05/11 |
Jumper usage on the PLC evaluation and development kits
Describe the jumpers on the various PLC boards and explain their usage.
|
Not yet rated
|
12/05/11 |
Physical Addressing vs. Logical Addressing for Powerline Communication
What is the difference between physical and logical addressing? When would I use one over the other?
|
(5/5) by 1
user
|
12/05/11 |
Transformer Options for the PLC High Voltage Reference Design
Do you have any options for the transformers used in the PLC High Voltage Reference Design?
|
Not yet rated
|
12/05/11 |
CENELEC frequency band supported by the Cypress PLC High Voltage Solution
What European CENELEC frequency band does the Cypress PLC High Voltage Solution support?
|
Not yet rated
|
12/05/11 |
Communication distance of the Cypress PLC High Voltage Solution
What is the longest distance that the Cypress PLC High Voltage Solution can communicate over?
|
Not yet rated
|
12/05/11 |
Transmitting between phases using PLC
Can the PLC signal transmitted from one phase be received by a node on another phase?
|
Not yet rated
|
12/05/11 |
Maximum and minimum input pin hysteresis for powerline communication products
What is the maximum and minimum input pin hysteresis for the powerline communication products?
|
Not yet rated
|
12/05/11 |