|
Title
|
Resource Type |
Related Categories |
Customer Rating
|
Updated
|
AN55427 - Cypress Powerline Communication Board Design Analysis
AN55427 describes the design of Powerline coupling circuit and on-board power supply used in Cypress's PLC Kits (CY3272/3273/3274/3275/3276/3277).
http://www.cypress.com/?rID=38366
|
Application Notes |
PSoC Designer,
Interface,
Powerline Communication
|
(4.8/5) by 4
users
|
12/10/12 |
AN58717 - PLC - LED Lighting Control using Powerline Communication
AN58717 describes the use of Powerline communication for LED lighting control using CY8CLED16P01.
http://www.cypress.com/?rID=40641
|
Application Notes |
PSoC Designer,
Interface,
Powerline Communication
|
(5/5) by 2
users
|
12/10/12 |
AN62487 - Cypress Powerline Communication (PLC) Repeater Implementation
AN62487 explains Cypress’ Powerline Communication Repeater algorithm and its implementation on CY8CPLC20
http://www.cypress.com/?rID=44468
|
Application Notes |
PSoC Designer,
Powerline Communication
|
(5/5) by 3
users
|
12/07/12 |
AN55102 - PSoC® 1 - Single Cell Li-Ion Battery Charger with CY8C21x23
AN55102 presents a Lithium-Ion (Li-Ion) battery charger design, with the smallest, low-cost PSoC® 1 device – CY8C21x23.
http://www.cypress.com/?rID=38367
|
Application Notes |
PSoC Designer,
CY8C21x23,
PSoC® 1
|
Not yet rated
|
12/07/12 |
AN49943 - PSoC® 1 USB-to-UART Bridge
Although USB is now the generally accepted standard for interfacing with PCs, RS-232 and other UART protocols are still widely used in embedded systems and some PC software. This application note describes a USB-to-UART bridge solution implemented in PSoC® 1. User module configuration, critical firmware, and reasons for a USB-to-UART bridge are also described.
http://www.cypress.com/?rID=34582
|
Application Notes |
PSoC Designer,
CY8C24x94,
PSoC® 1
|
(4.3/5) by 4
users
|
12/07/12 |
AN50475 - Induction Cooker Design with CapSense®
AN50475 discusses the implementation of an induction cooker with CapSense® control based on CY8C22x45.
http://www.cypress.com/?rID=34409
|
Application Notes |
CY8C22xxx/CY8C21x45,
PSoC Designer,
PSoC® 1
|
(5/5) by 4
users
|
12/07/12 |
AN50987 - Getting Started with I2C in PSoC® 1
AN50987 discusses the I2C protocol, and how the PSoC 1 device handles I2C communications.
http://www.cypress.com/?rID=34486
|
Application Notes |
CY8C22xxx/CY8C21x45,
CY8C24x23A,
PSoC Designer,
CY8C23x33,
CY8C28xxx,
CY8C20x34,
CY8C27x43,
CY8C20xx6A,
CY8C21x34,
CY8C21x23,
CY8C24x94,
PSoC® 1,
CY8C29x66
|
(4.8/5) by 6
users
|
12/07/12 |
AN50989 - PSoC® 1 - USB TO SPI Bridge using PSoC
This application note discusses how to implement a USB to SPI bridge using PSoC 1.
http://www.cypress.com/?rID=34330
|
Application Notes |
PSoC Designer,
CY8C24x94,
PSoC® 1
|
Not yet rated
|
12/07/12 |
AN64275 - PSoC® 3 and PSoC 5LP Getting More Resolution from 8-Bit DACs
AN64275 demonstrates how to increase the resolution of the 8-bit DACs available in the PSoC 3 and 5LP devices up to 12-bits using additional PSoC resources.
http://www.cypress.com/?rID=47478
|
Application Notes |
PSoC® 5,
PSoC® 3,
PSoC® 5LP,
PSoC® Creator™
|
(4.4/5) by 5
users
|
12/07/12 |
AN2010 - PSoC® 1 Best Practices and Recommendations
AN2010 provides some introductory guidelines and best practices for developing PSoC® 1 systems, and it exposes some common mistakes designers make.
http://www.cypress.com/?rID=2848
|
Application Notes |
CY8C22xxx/CY8C21x45,
CY8C24x23A,
PSoC Designer,
CY8C27x43,
Programmable System-on-Chip,
CY8C21x23,
CY8C24x94,
PSoC® 1,
CY8C29x66
|
(4.5/5) by 2
users
|
12/07/12 |
Power Management - Increasing Output Power of a Switch Mode Pump - AN2349
AN2349 demonstrates how to increase the output current of the PSoC’s switch mode pump (SMP) up to 500 mA.
http://www.cypress.com/?rID=2706
|
Application Notes |
CY8C22xxx/CY8C21x45,
CY8C24x23A,
PSoC Designer,
CY8C27x43,
CY8C21x34,
CY8C21x23,
PSoC® 1,
CY8C29x66
|
(4/5) by 1
user
|
12/07/12 |
AN2197 - Stepper Motor Driver for Smart Gauges
AN2197 shows how to use the PSoC® Programmable System-on-Chip to drive a low-power stepper motor for smart pointer gauges.
http://www.cypress.com/?rID=2638
|
Application Notes |
CY8C24x23A,
PSoC Designer,
CY8C27x43,
PSoC® 1
|
(5/5) by 1
user
|
12/07/12 |
AN60321 - Peak Detection with PSoC® 3 and PSoC 5LP
AN60321 describes several techniques for implementing a peak detector in PSoC 3 and PSoC 5LP.
http://www.cypress.com/?rID=41001
|
Application Notes |
CY8C36xxx,
PSoC® 5,
CY8C34xxx,
PSoC® 3,
CY8C32xxx,
PSoC® 5LP,
PSoC® Creator™,
CY8C38xxx
|
(5/5) by 3
users
|
12/06/12 |
AN60220 - PSoC® 3 / PSoC 5LP Multiplexed Comparator
AN60220 describes how to multiplex the comparator for use with more than one input signal.
http://www.cypress.com/?rID=40638
|
Application Notes |
CY8C36xxx,
PSoC® 5,
CY8C34xxx,
PSoC® 3,
CY8C32xxx,
PSoC® 5LP,
PSoC® Creator™,
CY8C38xxx
|
(5/5) by 1
user
|
12/06/12 |
AN81623 - PSoC® 3 and PSoC 5LP Digital Design Best Practices
AN81623 gives a brief introduction to the digital hardware design theory and then describes the powerful and highly flexible digital subsystem in PSoC 3 and PSoC 5LP. It describes best practices for digital design using PSoC Creator, and shows how to use static timing analysis (STA) report files.
http://www.cypress.com/?rID=67774
|
Application Notes |
PSoC® 5,
PSoC® 3,
PSoC® 5LP
|
Not yet rated
|
12/05/12 |
AN60631 - PSoC® 3 and PSoC 5LP Clocking Resources
AN60631 covers PSoC® 3 and PSoC 5LP's highly versatile and reconfigurable clocking system.
http://www.cypress.com/?rID=40990
|
Application Notes |
CY8C36xxx,
CY8C34xxx,
PSoC® 3,
CY8C32xxx,
PSoC® 5LP,
PSoC® Creator™,
CY8C38xxx
|
(5/5) by 1
user
|
12/05/12 |
AN60616 - PSoC® 3 and PSoC 5LP Startup Procedure
AN60616 describes PSoC® 3 and PSoC 5LP startup procedures, from the application of device power until the execution of user code. It describes how to customize the startup procedure, and includes the reasons a designer might want to change the startup procedure.
http://www.cypress.com/?rID=40991
|
Application Notes |
CY8C36xxx,
CY8C34xxx,
PSoC® 3,
CY8C32xxx,
PSoC® 5LP,
PSoC® Creator™,
CY8C38xxx
|
(5/5) by 1
user
|
12/05/12 |
AN54439 - PSoC® 3 and PSoC 5LP External Crystal Oscillators
AN54439 describes how to use an external crystal or ceramic resonator at 32.768 kHz or in the 4-25 MHz range in PSoC® 3 or PSoC 5LP. External crystal oscillators provide more accurate clock signals than the oscillators built into PSoC 3 and 5LP.
http://www.cypress.com/?rID=37884
|
Application Notes |
CY8C36xxx,
CY8C53xxx,
PSoC® 5,
CY8C52xxx,
CY8C55xxx,
CY8C34xxx,
PSoC® 3,
CY8C32xxx,
PSoC® 5LP,
PSoC® Creator™,
PSoC® Software,
CY8C54xxx
|
(3.9/5) by 11
users
|
12/05/12 |
AN69133 - PSoC® 3 / PSoC 5LP Easy Waveform Generation with the WaveDAC8 Component
AN69133 describes how the WaveDAC8 component works and how to use it to generate either predefined or custom waveforms.
http://www.cypress.com/?rID=54728
|
Application Notes |
PSoC® 5,
CY8C55xxx,
PSoC® 3,
PSoC® 5LP,
CY8C38xxx
|
(4.7/5) by 3
users
|
12/05/12 |
AN60580 - SIO Tips and Tricks in PSoC® 3 / PSoC 5LP
AN60580 explains the following applications of SIO pins: Comparator, Charge pump, Level shifter, Half wave rectifier, Peak detector, and Sleep wakeup using SIO Comparator.
http://www.cypress.com/?rID=40989
|
Application Notes |
PSoC® 5,
CY8C55xxx,
PSoC® 3,
PSoC® 5LP,
PSoC® Creator™,
CY8C38xxx
|
(3.5/5) by 2
users
|
12/05/12 |
AN52927 - PSoC® 3 and PSoC 5LP - Segment LCD Direct Drive
Although segment LCD modules are available with inbuilt drivers, these modules are more expensive than segment LCD glass. PSoC® 3 and PSoC 5 LP, with its configurable analog and digital hardware, also has an integrated configurable LCD driver that supports a wide variety of LCD glass types. This application note explains how to drive multiplexed segment LCD glass using PSoC 3 and PSoC 5LP.
http://www.cypress.com/?rID=37795
|
Application Notes |
PSoC® 5,
CY8C55xxx,
PSoC® 3,
PSoC® 5LP,
PSoC® Creator™,
PSoC® Software,
CY8C38xxx
|
(5/5) by 1
user
|
12/05/12 |
AN60024 - Switch Debouncer and Glitch Filter with PSoC® 3 and PSoC 5LP
AN60024 introduces the concepts of switch debouncing and glitch filtering for digital input signals, and shows how to create several debounce and filter projects for PSoC® 3 and PSoC 5LP, using PSoC Creator™.
http://www.cypress.com/?rID=40974
|
Application Notes |
CY8C36xxx,
PSoC® 5,
CY8C34xxx,
PSoC® 3,
CY8C32xxx,
PSoC® 5LP,
PSoC® Creator™,
CY8C38xxx
|
(5/5) by 1
user
|
12/05/12 |
AN66444 - PSoC® 3 and PSoC 5LP Correlated Double Sampling to Reduce Offset, Drift, and Low Frequency Noise
AN66444 describes the implementation of correlated double sampling (CDS) in PSoC ® 3 and PSoC 5LP, for DC offset cancellation and noise reduction.
http://www.cypress.com/?rID=49159
|
Application Notes |
PSoC® 5,
CY8C55xxx,
PSoC® 3,
PSoC® 5LP,
CY8C38xxx
|
(2/5) by 1
user
|
12/05/12 |
AN62510 - Implementing State Machines with PSoC® 3 / PSoC 5LP
The method to implement state machines using the PSoC® 3 / PSoC 5LP family of devices is explained in this Application Note. Mealy and Moore state machines implementations are shown with associated projects.
http://www.cypress.com/?rID=44402
|
Application Notes |
PSoC® 5,
CY8C55xxx,
PSoC® 3,
PSoC® 5LP,
PSoC® Creator™,
CY8C38xxx
|
(4/5) by 1
user
|
12/05/12 |
AN57473 - PSoC® 3 / PSoC 5LP USB HID Fundamentals with Mouse and Joystick
AN57473 covers basic Human Interface Device (HID) USB development on PSoC® 3 and PSoC 5LP. It focuses on basic mouse and joystick inputs as example projects.
http://www.cypress.com/?rID=39404
|
Application Notes |
PSoC® 5,
PSoC® 3,
PSoC® 5LP,
PSoC® Creator™,
PSoC® Software
|
(4.4/5) by 9
users
|
12/05/12 |
AN75813 - H Bridge Based Motor Drive Protection Using PSoC® 3
AN75813 demonstrates the use of a PSoC 3 for brushed DC motor drive protection and diagnostics. The PSoC 3 protection system is optimized for the widely used H bridge, but it can easily be adapted to other DC motors. The implementation emphasizes the use of digital logic present on the PSoC 3 to free the CPU for more involved tasks such as motor control. This application note specifically addresses motor drive protection and diagnostics and does not discuss motor control.
http://www.cypress.com/?rID=68670
|
Application Notes |
Automotive,
PSoC® 5,
PSoC® 3,
PSoC® 1,
CY8C38xxx
|
Not yet rated
|
12/04/12 |
Interfacing SRAM with FX2LP over GPIF - AN57322
This application note discusses how to connect Cypress SRAM CY7C1399B to FX2LP over the General Programmable Interface (GPIF).
http://www.cypress.com/?rID=39392
|
Application Notes |
EZ-USB AT2LP™,
EZ-USB FX2LP™,
USB Hi-Speed Peripherals
|
(4/5) by 2
users
|
11/28/12 |
AN56835 - Interfacing West Bridge® Astoria to WirelessUSB™ LP
West Bridge® Astoria is a USB and mass storage peripheral controller that contains three main ports: processor interface (P-Port), mass storage support (S-Port), and USB interface (U-Port).
http://www.cypress.com/?rID=39128
|
Application Notes |
Antioch™,
Bridges - West Bridge® Controllers
|
(5/5) by 1
user
|
11/28/12 |
AN73304 - Booting EZ-USB® FX3 over Synchronous ADMux Interfaces
http://www.cypress.com/?rID=56489
|
Application Notes |
EZ-USB FX3™
|
Not yet rated
|
11/27/12 |
AN70193 - EZ-USB® FX3 SPI Boot Option
http://www.cypress.com/?rID=52343
|
Application Notes |
EZ-USB FX3™
|
Not yet rated
|
11/27/12 |
AN73150 - Booting EZ-USB® FX3 over High-Speed USB
http://www.cypress.com/?rID=56486
|
Application Notes |
EZ-USB FX3™
|
Not yet rated
|
11/27/12 |
AN48303 - CapSense® Express™ - Migrating from Firmware Rev 0x15 to Rev 0x1B
AN48303 discusses the compatibility issues that you should consider before migrating from CapSense® Express™ firmware revision 0x15 to 0x1B.
http://www.cypress.com/?rID=17624
|
Application Notes |
|
(5/5) by 1
user
|
11/23/12 |
AN44517 - Design Recommendation for Battery Backed SRAMs Using Cypress MoBL® SRAMs
http://www.cypress.com/?rID=12710
|
Application Notes |
Async Micropower (MoBL™) SRAMs
|
(5/5) by 1
user
|
11/23/12 |
Working With inf File of a Device Using CyUSB.sys - AN61465
http://www.cypress.com/?rID=43539
|
Application Notes |
USB Full-Speed Peripherals,
EZ-USB™ FX1
|
(5/5) by 1
user
|
11/07/12 |
AN74505 - EZ-USB® FX2LP™ - Developing USB Application on MAC OS X using LIBUSB
AN74505 describes how libusb-1.0 can be used to develop USB host application (Cocoa Application) on MAC OS X 10.6/10.7 for Cypress EZ-USB® FX2LP™ products. This includes step-by-step procedure for developing a host application to communicate with FX2LP products. Here, a bulkloop host application is demonstrated using a bulkloop firmware.
http://www.cypress.com/?rID=59674
|
Application Notes |
EZ-USB FX2LP™
|
Not yet rated
|
11/05/12 |
AN54908 - Accelerated Neutron SER Testing and Calculation of Terrestrial Failure Rates
http://www.cypress.com/?rID=38369
|
Application Notes |
PSoC Designer,
Programmable System-on-Chip,
Memory
|
(5/5) by 18
users
|
11/02/12 |
AN69196 - Startup Issue with CY2305
http://www.cypress.com/?rID=50945
|
Application Notes |
Zero Delay Buffers
|
Not yet rated
|
10/29/12 |
ANC0001 - Layout Recommendations for the CY22388, CY22389, and CY22391 Devices
http://www.cypress.com/?rID=12598
|
Application Notes |
Clock Generation
|
Not yet rated
|
10/22/12 |
AN63788 - CyUSB.sys Driver for EZ-USB®
http://www.cypress.com/?rID=45789
|
Application Notes |
USB Full-Speed Peripherals,
EZ-USB™ FX1
|
Not yet rated
|
10/17/12 |
AN6075 - enCoRe™ II USB Bootloader
http://www.cypress.com/?rID=12994
|
Application Notes |
USB Low-Speed Peripherals,
enCoRe™ II
|
(3.7/5) by 3
users
|
10/16/12 |
AN66806 - Getting Started with EZ-USB® FX2LP™ GPIF
The GPIF is a programmable parallel interface that provides a glue-less interface between the EZ-USB® FX2LP™ and an external peripheral.
http://www.cypress.com/?rID=12937
|
Application Notes |
EZ-USB FX2LP™,
USB Hi-Speed Peripherals
|
(4.7/5) by 3
users
|
10/16/12 |
AN73609 - EZ-USB® FX2LP™/ FX3™ Developing Bulk-Loop Example on Linux
AN73609 describes how libusb can be used to develop an USB host application on a Linux-based OS for Cypress EZ-USB® FX2LP™/ FX3™ products. It includes a step-by-step procedure for developing the bulk-loop example.
http://www.cypress.com/?rID=57610
|
Application Notes |
EZ-USB FX2LP™,
EZ-USB FX3™
|
Not yet rated
|
10/15/12 |
Guide to Boot EZ-USB from External Parallel Memory - AN55037
http://www.cypress.com/?rID=38168
|
Application Notes |
USB Hi-Speed Peripherals
|
Not yet rated
|
10/05/12 |
AN80994 - PSoC® 3 and PSoC 5 EMC Best Practices and Recommendations
AN80994 gives recommendations and best practices that help in improving the EMC performance of PSoC 3 and PSoC 5 based designs.
http://www.cypress.com/?rID=67839
|
Application Notes |
PSoC® 5,
PSoC® 3
|
Not yet rated
|
10/03/12 |
AN43380 - HSB Operation in nvSRAMs
This application note describes the internal architecture and functionality of Hardware STORE Busy (HSB) pin of Cypress nvSRAMs.
http://www.cypress.com/?rID=12770
|
Application Notes |
nvSRAM Parallel,
Nonvolatile Products,
nvSRAM Serial
|
(5/5) by 1
user
|
10/03/12 |
AN6022 - A Comparison between nvSRAMs and BBSRAMs
http://www.cypress.com/?rID=35449
|
Application Notes |
Nonvolatile Products,
Memory
|
Not yet rated
|
09/27/12 |
AN69702 - 72-Mbit RHQDRII+™ Power Modes
http://www.cypress.com/?rID=51728
|
Application Notes |
Sync SRAMs
|
Not yet rated
|
09/25/12 |
AN64574 - Designing with Serial Peripheral Interface (SPI) nvSRAM
Cypress's serial peripheral interface (SPI) nvSRAM is a high-performance nonvolatile serial memory that offers zero cycle delay write operation and infinite SRAM write endurance.
http://www.cypress.com/?rID=47470
|
Application Notes |
Nonvolatile Products,
nvSRAM Serial
|
Not yet rated
|
09/25/12 |
AN4011 - Choosing The Right Cypress Synchronous SRAM
This application note gives an overview of Standard Synchronous, NoBL, QDR-II, QDR-II+, DDR-II and DDR-II+ SRAM's.
http://www.cypress.com/?rID=13042
|
Application Notes |
DDR-II CIO,
Standard Sync,
Sync SRAMs,
DDR-II SIO,
DDR-II+ CIO,
QDR,
QDR-II,
NoBL,
QDR-II+,
Wafer & Die
|
Not yet rated
|
09/24/12 |
AN1090 - NoBL™: The Fast SRAM Architecture
AN1090 describes the operation of NoBL™ SRAMs and outlines how it is suitable for networking applications.
http://www.cypress.com/?rID=12879
|
Application Notes |
Sync SRAMs,
NoBL
|
Not yet rated
|
09/21/12 |
AN46982 - PLL Considerations in QDRII/II+/DDRII/II+SRAMS
AN46982 provides an overview of the operation of QDR-II/II+/DDR-II/II+ SRAMs in PLL disabled mode.
http://www.cypress.com/?rID=53503
|
Application Notes |
Sync SRAMs
|
Not yet rated
|
09/21/12 |
AN4065 - QDR™-II, QDR-II+, DDR-II, and DDR-II+ Design Guide
http://www.cypress.com/?rID=12889
|
Application Notes |
DDR-II CIO,
Sync SRAMs,
DDR-II SIO,
DDR-II+ CIO,
QDR,
QDR-II,
QDR-II+
|
(4.3/5) by 3
users
|
09/21/12 |
AN42468 - On-Die Termination for QDR™II+/DDRII+ SRAMs
AN42468 discusses on-die termination (ODT) scheme, implementation, advantages and power calculation for the QDR™II+ and DDRII+ family of Synchronous SRAMs on the 65-nm technology devices.
http://www.cypress.com/?rID=12890
|
Application Notes |
Sync SRAMs,
DDR-II+ CIO,
QDR-II+
|
(4/5) by 1
user
|
09/11/12 |
AN4078 - Migrating From EZ-USB® FX2™ to EZ-USB FX2LP™
AN4078_C provides details on how to migrate an EZ-USB FX2 based design to EZ-USB FX2LP based design. It highlights the differences between the EZ-USB FX2LP™ and EZ-USB FX2™. It also provides a brief description of the whole product support collateral available for development work with FX2LP.
http://www.cypress.com/?rID=12968
|
Application Notes |
EZ-USB AT2LP™,
EZ-USB FX2LP™,
USB Hi-Speed Peripherals
|
(5/5) by 1
user
|
09/11/12 |
AN1236 - CY23FP12 Field Programming Guide
The various programmable options of the CY23FP12 high performance zero delay buffer (ZDB) makes it a versatile clock distribution solution. The device architecture, programmable options, programming process, and software configuration tools of the CY23FP12 ZDB are explained in detail.
http://www.cypress.com/?rID=12627
|
Application Notes |
Clock Distribution,
Zero Delay Buffers
|
(4/5) by 1
user
|
09/11/12 |
AN49107 - Total System Timing and EMI Reduction Using the CY25400 Spread Spectrum Clock Generator
AN49107 describes the features and advantages of four phase-locked loop (PLL) ICs of CY254XX and CY254X clock synthesizers.The application note also details the EMI noise elimination technique using spread spectrum method.
http://www.cypress.com/?rID=17633
|
Application Notes |
EMI Reduction Clocks
|
Not yet rated
|
09/05/12 |
AN45197 - Using the Hex2bix Conversion Utility
http://www.cypress.com/?rID=17627
|
Application Notes |
USB Hi-Speed Peripherals
|
(5/5) by 1
user
|
08/28/12 |
AN63787 - EZ-USB® FX2LP™ GPIF and Slave FIFO Configuration Examples Using 8-bit Asynchronous Interface
AN63787 discusses how to configure the general programmable interface (GPIF) and slave FIFOs of EZ-USB FX2LP™ in both manual mode and auto mode, to implement an 8-bit asynchronous parallel interface. This Application Note is tested with two FX2LP development kits connected in back-to-back setup; the first one acting in master mode and the second in slave mode.
http://www.cypress.com/?rID=45850
|
Application Notes |
EZ-USB FX2LP™,
USB Hi-Speed Peripherals
|
Not yet rated
|
08/28/12 |
AN61546 - Non Volatile Static Random Access Memory (nvSRAM) Real Time Clock (RTC) Design Guidelines and Best Practices
AN61546 describes the real time clock (RTC) functionality, components selection criteria, and best layout design practices for the nvSRAM RTC design. Design guidelines and best practices advised in this application note are intended to assist customers in designing nvSRAM with RTC functions in their system design and minimize timing errors, which mostly occur due to improper layout design and components selection.
http://www.cypress.com/?rID=45439
|
Application Notes |
nvSRAM Parallel,
Nonvolatile Products,
nvSRAM Serial
|
Not yet rated
|
08/27/12 |
AN75432 - USB 3.0 EZ-USB® FX3™ Orientation
http://www.cypress.com/?rID=60356
|
Application Notes |
USB SuperSpeed Peripherals
|
Not yet rated
|
08/24/12 |
AN69235 - Migrating from HX2/HX2LP to HX2VL
http://www.cypress.com/?rID=52716
|
Application Notes |
HX2VL,
HX2LP
|
(5/5) by 1
user
|
08/23/12 |
AN6017 - Differences in Implementation of 65 nm QDR™II/DDRII and QDRII+/DDRII+ Memory Interfaces
http://www.cypress.com/?rID=12892
|
Application Notes |
DDR-II CIO,
Sync SRAMs,
DDR-II SIO,
DDR-II+ CIO,
QDR-II,
QDR-II+
|
(4/5) by 2
users
|
08/23/12 |
EZ-USB® FX2LPTM/FX2LP18 56-Ball BGA PCB Layout Guidelines
http://www.cypress.com/?rID=12719
|
Application Notes |
EZ-USB FX2LP™,
USB Hi-Speed Peripherals
|
Not yet rated
|
08/22/12 |
AN6066 - Wireless Binding Methodologies
AN6066 discusses the general considerations for deciding on a binding methodology of devices in robust wireless systems, and also gives examples of common binding schemes, highlighting their advantages and disadvantages. It is intended for system architects, particularly those who are relatively new to wireless designs.
http://www.cypress.com/?rID=13067
|
Application Notes |
WirelessUSB™ LP,
WirelessUSB™ LP star ,
USB Controllers,
PRoC LP,
enCoRe V Low Voltage,
enCoRe II Low Voltage,
RF Transceivers™,
PRoC LPstar,
enCoRe III Low Voltage
|
Not yet rated
|
08/16/12 |
AN76474 - PSoC® 3 Power Supervisor
AN76474 demonstrates how you can quickly implement and customize a full-featured power supervisor that supports up to 13 power supply rails with Cypress’s PSoC® 3.
http://www.cypress.com/?rID=66896
|
Application Notes |
PSoC® 3
|
Not yet rated
|
08/16/12 |
AN6023 - NonVolatile SRAM (nvSRAM) Basics
http://www.cypress.com/?rID=35116
|
Application Notes |
nvSRAM Parallel,
Nonvolatile Products,
nvSRAM Serial
|
(4/5) by 1
user
|
08/16/12 |
AN53313 - Real Time Clock Calibration in Cypress nvSRAM
http://www.cypress.com/?rID=38165
|
Application Notes |
nvSRAM Parallel,
Nonvolatile Products,
nvSRAM Serial
|
Not yet rated
|
08/15/12 |
AN64465 - West Bridge® Integration to Android on OMAP Zoom II MDP: RNDIS, CDC-ECM, and Mass Storage Functions
http://www.cypress.com/?rID=46753
|
Application Notes |
Bridges - West Bridge® Controllers,
Astoria™
|
Not yet rated
|
08/14/12 |
AN49081 - Requirements for Input Clock to West Bridge® Devices
AN49081 addresses the requirements for the input clock to West Bridge® devices that includes Antioch™, Astoria™, and TX3LP18. The conversion of phase noise specifications into equivalent RMS jitter is also discussed.
http://www.cypress.com/?rID=17632
|
Application Notes |
Antioch™,
Astoria™
|
Not yet rated
|
08/14/12 |
AN47864 - Interfacing TI OMAPV1030 Processor to Astoria's Pseudo-NAND Processor Port
http://www.cypress.com/?rID=12614
|
Application Notes |
Bridges - West Bridge® Controllers,
Astoria™
|
(5/5) by 1
user
|
08/14/12 |
AN46860 - Schematic Review Checklist for West Bridge® Astoria™
http://www.cypress.com/?rID=12963
|
Application Notes |
USB Hi-Speed Peripherals,
Astoria™
|
Not yet rated
|
08/14/12 |
AN46712 - Interfacing to the West Bridge® Astoria™ Pseudo-NAND Processor Port
http://www.cypress.com/?rID=53149
|
Application Notes |
Astoria™
|
Not yet rated
|
08/14/12 |
AN34359 - PCB Layout Guidelines for West Bridge™ Generation A Peripheral Controllers in Wafer Level Chip Scale Package
http://www.cypress.com/?rID=12611
|
Application Notes |
Antioch™,
Bridges - West Bridge® Controllers
|
Not yet rated
|
08/14/12 |
AN13652 - Schematic Review Checklist for West Bridge® Antioch™
http://www.cypress.com/?rID=12613
|
Application Notes |
Antioch™,
Bridges - West Bridge® Controllers
|
(3/5) by 1
user
|
08/14/12 |
AN023 - USB Compliance Testing Overview
This application note discusses USB Compliance Testing.
http://www.cypress.com/?rID=12995
|
Application Notes |
USB Low-Speed Peripherals,
USB Hosts,
USB Hi-Speed Hubs,
USB Full-Speed Peripherals,
HX2LP,
USB Hi-Speed Peripherals
|
(5/5) by 1
user
|
08/10/12 |
AN15456 - Guide to Successful EZ-USB(R) FX2LP(TM) and EZ-USB FX1(TM) Hardware Design and Debug
http://www.cypress.com/?rID=12956
|
Application Notes |
EZ-USB FX2LP™,
EZ-USB™ FX1,
USB Hi-Speed Peripherals
|
(4/5) by 2
users
|
08/10/12 |
Troubleshooting USB 2.0 Signal Quality - AN13632
http://www.cypress.com/?rID=12947
|
Application Notes |
USB Hi-Speed Peripherals
|
Not yet rated
|
08/10/12 |
Mac OS X: Getting Started with USB - AN1105
http://www.cypress.com/?rID=12929
|
Application Notes |
USB Low-Speed Peripherals,
USB Hi-Speed Hubs,
TetraHub,
USB Full-Speed Peripherals,
USB Hi-Speed Peripherals
|
(5/5) by 3
users
|
08/10/12 |
AN5040 - Migrating From AN21xx to FX1
http://www.cypress.com/?rID=12922
|
Application Notes |
USB Full-Speed Peripherals,
EZ-USB™ FX1
|
Not yet rated
|
08/10/12 |
Migrating From EZ-USB® FX™ to EZ-USB FX1 - AN5063
http://www.cypress.com/?rID=12916
|
Application Notes |
USB Full-Speed Peripherals,
EZ-USB™ FX1
|
Not yet rated
|
08/10/12 |
AN4017 - Understanding Temperature Specifications: An Introduction
http://www.cypress.com/?rID=12896
|
Application Notes |
DDR-II CIO,
Standard Sync,
Sync SRAMs,
DDR-II SIO,
DDR-II+ CIO,
Automotive,
QDR,
QDR-II,
NoBL,
QDR-II+,
Wafer & Die,
Automotive Beta,
Automotive PSoC 3
|
(5/5) by 1
user
|
08/08/12 |
AN64408 - Getting Started with NX2LP-Flex(TM)
http://www.cypress.com/?rID=46712
|
Application Notes |
EZ-USB NX2LP-Flex™,
USB Hi-Speed Peripherals
|
Not yet rated
|
08/08/12 |
AN52133 - Frequency Margining using FleXO™ and Its Applications
Cypress FleXO devices provide users with the ability to change output frequency with a unique frequency margining feature built into their design. This capability can be used at all stages of system design for troubleshooting, design optimization, and testing. This application note serves as a guide to this feature. Included usage examples provide additional detail.
http://www.cypress.com/?rID=35389
|
Application Notes |
FleXO™ High Performance Clock Generator
|
(4/5) by 3
users
|
08/07/12 |
AN68829 - Slave FIFO Interface for EZ-USB® FX3™: 5-Bit Address Mode
AN68829 discusses asynchronous and synchronous Slave FIFO interfaces for the EZ-USB® FX3™ SuperSpeed USB controller. This application note also describes the mode in which the interface supports a 5-bit address bus and lets you access all 32 internal sockets of EZ-USB FX3.
http://www.cypress.com/?rID=59936
|
Application Notes |
EZ-USB FX3™
|
Not yet rated
|
08/07/12 |
AN1268 - Overview of Cypress Neuron® Devices
AN1268 gives an overview of the CY7C53210E2, CY7C53210E4, and CY7C53150 products.
http://www.cypress.com/?rID=12633
|
Application Notes |
Control Communications
|
(5/5) by 1
user
|
07/30/12 |
AN15979 - Soft Errors in nvSRAM
AN15979 describes the soft error causes in the memories and how nvSRAM-architecture features and packaging techniques act to reduce soft errors.
http://www.cypress.com/?rID=12761
|
Application Notes |
nvSRAM Parallel,
Nonvolatile Products,
nvSRAM Serial
|
Not yet rated
|
07/26/12 |
Configuring a Xilinx Spartan-3E FPGA Over USB Using EZ-USB FX2LP™ - AN63620
http://www.cypress.com/?rID=46029
|
Application Notes |
EZ-USB FX2LP™,
USB Hi-Speed Peripherals
|
(3.5/5) by 4
users
|
07/24/12 |
AN4053 - Streaming Data Through Isochronous or Bulk Endpoints on EZ-USB® FX2™ and EZ-USB FX2LP™
Discusses streaming data via isochronous/bulk endpoints using the CY7C68013 EZ-USB FX2.
http://www.cypress.com/?rID=12967
|
Application Notes |
EZ-USB AT2LP™,
EZ-USB FX2LP™,
USB Hi-Speed Peripherals
|
(5/5) by 1
user
|
07/24/12 |
AN6077 - Implementing an 8-Bit Asynchronous Interface with FX2LP™
http://www.cypress.com/?rID=12946
|
Application Notes |
EZ-USB AT2LP™,
EZ-USB FX2LP™,
USB Hi-Speed Peripherals
|
(3/5) by 2
users
|
07/24/12 |
Firmware Optimization in EZ-USB® - AN61244
http://www.cypress.com/?rID=43047
|
Application Notes |
USB Hi-Speed Peripherals
|
(5/5) by 2
users
|
07/24/12 |
Setting Up, Using, and Troubleshooting the Keil(TM) Debugger Environment - AN42499
http://www.cypress.com/?rID=12960
|
Application Notes |
USB Hi-Speed Peripherals
|
(5/5) by 1
user
|
07/24/12 |
AN5078 - EZ-USB Hardware - Design considerations for EEPROM usage
http://www.cypress.com/?rID=12948
|
Application Notes |
USB Hi-Speed Peripherals
|
Not yet rated
|
07/24/12 |
AN48399 - WirelessUSB™ LP/LPstar Transceiver PCB Layout Guidelines
http://www.cypress.com/?rID=34190
|
Application Notes |
WirelessUSB™ LP,
WirelessUSB™ LP star ,
USB Controllers,
Wireless/RF
|
Not yet rated
|
07/23/12 |
AN48610 - Design and Layout Guidelines for Matching Network and Antenna for WirelessUSB™ LP Family
AN48610 provides design and layout guidelines for the matching network and antenna recommended for the WirelessUSB™ LP/LPstar radio. Follow these suggestions to minimize time and expenses when developing your own integrated wireless solution.
http://www.cypress.com/?rID=17634
|
Application Notes |
WirelessUSB™ LP,
USB Controllers,
Wireless/RF
|
Not yet rated
|
07/23/12 |
WirelessUSB LP RDK Japanese Radio Law Testing and Verification - AN17581
http://www.cypress.com/?rID=13051
|
Application Notes |
WirelessUSB™ LP,
WirelessUSB™ LP star ,
USB Controllers,
PRoC LP,
enCoRe V Low Voltage,
enCoRe II Low Voltage,
RF Transceivers™,
PRoC LPstar,
enCoRe III Low Voltage
|
Not yet rated
|
07/23/12 |
AN64285 - WirelessUSB(TM) NL Low Power Radio Recommended Usage and PCB Layout
http://www.cypress.com/?rID=46687
|
Application Notes |
WirelessUSB™ LP,
enCoRe V Low Voltage,
enCoRe II Low Voltage,
PRoC-UI,
WirelessUSB™ NL ,
enCoRe III Low Voltage
|
Not yet rated
|
07/23/12 |
AN15482 - Using Capture Timers in enCoRe™ II and enCoRe II LV Devices
http://www.cypress.com/?rID=12993
|
Application Notes |
USB Low-Speed Peripherals,
enCoRe™ II,
RF Companion Microcontrollers,
enCoRe II Low Voltage
|
(4/5) by 1
user
|
07/23/12 |
AN6062 - enCoRe to enCoRe II Conversion
http://www.cypress.com/?rID=12992
|
Application Notes |
USB Low-Speed Peripherals,
enCoRe™ II
|
(5/5) by 1
user
|
07/23/12 |
AN19219 - WirelessUSB™ Crystal Guidelines
http://www.cypress.com/?rID=49106
|
Application Notes |
|
Not yet rated
|
07/23/12 |
AN5033 - WirelessUSB™ Dual Antenna Design Layout Guidelines
WirelessUSB(TM) Dual Antenna Design Layout Guidelines
http://www.cypress.com/?rID=13058
|
Application Notes |
WirelessUSB™ LP,
WirelessUSB™ LP star ,
PRoC LP,
enCoRe V Low Voltage,
enCoRe II Low Voltage,
RF Transceivers™,
PRoC LPstar,
enCoRe III Low Voltage
|
(2/5) by 1
user
|
07/23/12 |