Is it possible to simulate the design and view the simulation results in PsoC creator?

No, you cannot.

But even better, you may connect a MiniProg3 to the SWD-pins and get a life debugger with brekpoints, variables inspection / settings and so on. Refer to http://www.cypress.com/?rID=55104 or the help within Creator.

Bob

If you are trying to simulate analog unfortunately no spice models

available yet.

If digital, and you are working in Verilog, no shortage of simulators

in the market, the FPGA guys have software to do so, and 3'rd

party like ICARUS or ModelSim.

A thread on this topic - http://www.cypress.com/?app=forum&id=2492&rID=51223

Regards, Dana.

One other thought, if your interest is spice simulation of analog,

manufacturers spice models not always complete. For example

in R-R input amps many spice models do not handle the crossover

distortion present in the input structure of R-R architectures switching

between N and P transistors.

So in short the simulation would be incomplete for worst case, and

especially in designs where you are trying to do high res analog error

analysis.

Regards, Dana.

 I think it may be usefull for PSoC designers to consult with the Proteus (www.labcenter.co.uk) designers in order for future collaboration. IMHO the Proteus SW is the most ready for PSoC simulation.

The key to collaboration here would be Cypress as there are no SPICE

models available as of yet for any PSOC family. So simulating in spice for Proteus

would be just the external stuff, which for PSOC would be almost pointless

because most PSOC designs use primariliy the onboard analog, the very point

of using a PSOC.

Regards, Dana.