All: what is the address I am to use for the DMAC itself. Is the destination (the second TD) base address PERIPHERAL_BASE? What is the upper 16 bits (which register do I refer to)? The source of course would be SRAM (it would contain the new pointer). Dave Van Ess's latest video about the "Numerically controlled oscillator" uses Indexed DMA to carry out it's function...I'd just like to be able to replicate that behavior.

Thanks.

I'm not exactly sure, what you're talking about.

In the TD, the first address-parameter specifies the source and the second the destination lower address word.
The high address word given in the channel setup differs from PSoC3 to PSoC5 as outlined in the DMA-datasheet. While in PSoC3 the upper 16 bits of a pointer are containing a descriptor of the memory-area (there are some different ones) in PSoC5 you'll find true pointers. There are some macros defined to ease swithching between PSoC3 and 5 targets, have a look into the "System Reference Guide" (under Help -> Documentation ->...)

Bob

Some reference material -

http://www.cypress.com/?rID=37793

http://www.cypress.com/?rID=44335

Regards, Dana.

Indexed DMA is explained in (a little bit) more detail in the PSoC Sensei blog: www.cypress.com/ - there is also an example project there.

Hli: that was what I needed. I hadn't yet gone that far back into the Sensei blog, I didn't realize he had done that example. Thanks for the tip.