Hello community, this is my first post.

I am interested in using Creator to move and manipulate data without invoking the CPU, ever. My concern is that the DMA components are only able to move from the ADC registers, to SRAM (where the CPU can do integer math), and then back to the DAC register. My motiviation in this particular project is to do some audio effects (phaser, echo, etc.). I'd like to use the ALUs and registers in the Datapaths to do the integer math manipulation, and to use the PLD logic for the machine states.

So, is this only possible through Designer rather than Creator? I get the feeling this is so, since it is my understanding that the Verilog code can only be used to create components out of the PLD logic.

Any advice is appreciated, thanks.

The simple answer to your question is yes this can be done in PSoC Creator. However, there is a learning curve and several steps to start doing your design.

To start: “ My concern is that the DMA components are only able to move from the ADC registers, to SRAM (where the CPU can do integer math), and then back to the DAC register.”

The DMA can be used to move data from any location to any other location. You can use the DMA to write data from the ADC to USB, SRAM, DACs, or even change PSoC Configuration registers (not recommended). The DMA is very flexible it has the same read/write privileges as the CPU.

Yes, the DMA wizard doesn’t show all of the possibilities, but all of the possibilities are there. To get familiar with DMA I recommend reading AN52705, appendix C provides all the important API you need to program the DMA to move data from one location to another.

Second: “ I'd like to use the ALUs and registers in the Datapaths to do the integer math manipulation, and to use the PLD logic for the machine states.”

This is very possible. The first step is to learn about how to create and program digital components specifically the datapath. The datapath is programmed via a separate tool known as the datapath configuration tool. To learn about this process I highly recommend viewing the following trainings: PSoC Creator 110, 111, 112, 113, 210, 211, 212, 213, & 214. These trainings can be found at the following link:

http://www.cypress.com/?id=1162&page=1

Also included with your install of PSoC Creator is a folder called “Component Development Kit” in this you will find the Datapath Configuration Tool. Also there is a document called the “Component Author Guide” this is another good source of information on how to create your own datapath components. Information on the datapaths can be found in section 4.3.5.2 and in Appendix B.

The datapath has 8 unique functions: Add, Subtract, Inc, Dec, Pass, XOR, OR, AND. It also has the ability to shift the results. If you are looking to do a multiply the Datapath does not have a native multiply instruction, but you can create one using shifts and adds.

So, is this only possible through Designer rather than Creator? I get the feeling this is so, since it is my understanding that the Verilog code can only be used to create components out of the PLD logic.

If I understand your design correctly you can easily implement this functionality using PSoC Creator. You are correct that Verilog Code will only use PLD logic. However, using the information above you can combine your verilog code and a datapath to create a unique and complex component to accomplish your goals.

Tdu: thanks for the quick and informative reply.

I guess I'll go one step further, and ask if the DMA can move data to a register that I create using the Verilog or Datapath tools? If so, how do I specify the transfer location? Would I create an address as if it were an external ROM and use an AND mask and a little glue logic to implement a "roll your own" register?

Thanks.

You can DMA to either Control registers or the datapath.  You can DMA from either a status register or the datapath.  In the case of the datapath there are registers that you can read and write (data registers) but the typical DMA is done using the FIFOs.  You cannot DMA directly to Flip-Flops in the PLD.

All of these locations have locations and they are all memory mapped.  There is no additional logic for you to include.  The exact location that they will be placed will vary depending on the how the design is mapped to the hardware.  This is handled by the build tools which will create #defines for each of these registers that you will use.  Then these #defines map these to the physical addresses.  If you look at the file cyfitter.h that is generated as part of any build you will see the defines that I'm refering to.  As an example I put a simple UDB based counter and then when I look at the cyfitter.h file I can see that the datapath FIFO FO can be referenced using:

#define Counter_1_CounterUDB_sC8_counterdp_u0__F0_REG CYREG_B1_UDB09_F0