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Suggestion: 1-Wire communications component
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Suggestion: 1-Wire communications component

Doug McClean posted on 16 May 2011 1:03 PM PST
Top Contributor
38 Forum Posts

The existing library of communications components seems to have most of the bases covered.

One thing I could use that isn't there is a 1-wire component.

It's possible to make one out of a UART with some wacky wiring (wire the rx and tx pins to the input and output sides of a pin in resistive pull up mode), some ISRs, and a small API but it would be nice to have a tested and validated one that everyone could use.




Re: Suggestion: 1-Wire communications component

Gautam Das posted on 17 May 2011 09:24 PM PST
Cypress Employee
742 Forum Posts

Hi Doug McClean,

 

So, do you intend to use the UART Component in Half Duplex mode using a single pin connected to the Rx and the Tx pin?

 

Regards,

dasg



Re: Suggestion: 1-Wire communications component

Doug McClean posted on 18 May 2011 08:33 AM PST
Top Contributor
38 Forum Posts

No, I use the UART like this:

http://img641.imageshack.us/i/onewireschematic.png/

With a schematic macro like this:

http://img10.imageshack.us/i/onewireschematicmacro.png/

Which sets up the in/out pin like this:

http://img834.imageshack.us/i/onewirepinconfig1.png/

http://img5.imageshack.us/i/onewirepinconfig2.png/

In accordance with instructions I found in http://www.atmel.com/dyn/resources/prod_documents/doc2579.pdf (see page 3 et seq.).

Really a verilog synthesizable one-wire master would probably be better if someone is going to make a professional version for everyone to use, but I am far from an expert.



Re: Suggestion: 1-Wire communications component

Doug McClean posted on 07 Jul 2011 02:39 PM PST
Top Contributor
38 Forum Posts

It turns out that Maxim provides (free of charge, even), a synthesizable 1-Wire bus master implementation in both Verilog and VHDL formats.

I'm working on learning how to wrap this up in a PSoC Creator component.






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