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PSoC5 DDS glitch
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PSoC5 DDS glitch

Vonaan posted on 28 Feb 2013 4:16 PM PST
Member
3 Forum Posts

Hi,

 

I'm new on the PSoC5 and I'm currently programming a DDS oscilator. I have it working but with a big glitch in the waveform. It'd periodic and difficult to debug because of the volume of data generated. the main loop is interupt driven and just picks a waveform value from a lookup table and sends it to a DAC.

I believe the glitch occurs when the 32bit accumulator is overflowing.It should just start at 0 again. Does anyone have an idea how I can debug this in order to make sure this is the root cause or know how to solve this?

Regards,

Peter




Re: PSoC5 DDS glitch

danaaknight posted on 28 Feb 2013 05:27 PM PST
Top Contributor
1773 Forum Posts

One approach is using a DSO to trigger on Tpulsewidth < Tglitch + some noise value,

and determine where exactly in DDS cycle glitch is occuring. Magnification capability

in DSO allows you to look before and after trigger.

 

Another approach is to trigger off upper MSBs of phase accumulator as you get close

to full scale. Do this with a digital comparator.

 

Regards, Dana.

 

 



Re: PSoC5 DDS glitch

Vonaan posted on 01 Mar 2013 03:41 PM PST
Member
3 Forum Posts

I don't have a DSO but use Audicity to record the audio input. It is however very difficult to determine in the output stream if it's deu to the accumulator overflow for there is no reference between the output and the accumulator. Stepping thu the program in debug mode is also nearly impossible.

You triggered me however with your second option so I'm going to investigate using the PSoC5 itself to diagnose the problem and it might even provide the trigger to reset the accumulator before an overflow occurs.

Thx!



Re: PSoC5 DDS glitch

Vonaan posted on 03 Mar 2013 03:17 AM PST
Member
3 Forum Posts

Hi Dana,

 

thx to your tip I was able to debug and found the problem was no the overflow of the accumulator but the fact my waveform table was one sample short :(

Anyway, I now found that if I use 8 bit samples on the VDAC8 the positive half of the sinus is flattened. After I reduce the max sample to be less then 200 instead of 255 it is a symetrical sinus again. Aparently a characteristic of the VDAC8 component. I'm currently debugging this, any tips on that as well?

Regards,

Peter






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