I'm having trouble finding the answer to this question.  I've integrated the RtcDesign example code into my PSoC5 project.  The seconds retreived from the RTC count up fine.  But if I sleep for 10 seconds, the next seconds value retrieved is NOT 10 seconds later.  It seems the RTC increment isn't happening during sleep.

I've changed "CyPmSleep" to "CyPmAltAct" as the only change, and the RTC continues.  But that draws 7 times the power of sleep.  I might be able to trim that if I research alt act more, but I'd rather use sleep if I can.  Note that there are you tube videos out there from Cypress that talk about RTC, sleep, and are titled as applying to both PSoC3 and PSoC5.  But nothing seems to apply to PSoC5.

I can't find an answer in the system reference, or architecture TRM, or CY8C55 family datasheet, or AN77900.  Somewhere I read that the 32-kHz clock continues to run on the PSoC5 in sleep mode.  But RTC isn't counting.  I would hope that the max 16ms sleeptimer business in the PSoC5 might afford the RTC an opportunity to process an interrupt between repeated 16ms sleeps, and thus be able to keep counting????

 ...FYI, note that the "PSoc 3, PSoC 5 Architecture TRM.pdf" says on page 151 "The 32 kHz crystal oscillator can be kept active, for precise timing (RTC), in the SLEEP/HIBERNATE modes."  It doesn't say "for PSoC3 only" or "but not for PSoC5".  So how do I accomplish this "precise timing" through SLEEP mode?...

 OK.  Darn.  That was a 2010 document.  I just noticed that date.  I downloaded new ones for PSoC3 and 5, separately.

Somebody must have made a mistake designing the PSoC5 silicon.  The "Real Time Clock" section of the TRM went from saysing "RTC functionality is available for use in all power modes except the Hibernate mode" to "RTC functionality is only available in the active mode."  Of course, this seems wrong already.  I realize the RTC component in TopDesign may be different from the RTC hardware in the silicon.  But, when I went into Alternate Active mode, the RTC component seemed to continue working, returning the correct seconds count after I returned to Active mode.  SO WHAT'S THE TRUTH, HERE?

 ...alright, so I might be stuck with using Alternate Active mode.  Can someone (Bob, again? thx) confirm that it's IMPOSSIBLE on the PSoC5 to use sleep mode and keep accurate timing?  

If so, then I refer to the Sept 26 2012 PSoC5 TRM page 112 table 18-1 Power Modes where it describes Alternate Active mode as "Similar to Active mode, and is typically configured to have fewer peripherals active to reduce power. One possible configuration is to use the UDBs for processing, with the CPU turned off Manual".  So how do I "[configure] to have fewer peripherals active?"  Is that as simple as calling Component_Stop()?  And might I turn the CPU off while the RTC still runs?  (For this, I'm guessing I'll have to get the processor running again before the next 1pps interrupt, or if it can queue and be pending, then at least before two of the 1pps interrupts occur, so as not to miss a count on seconds...)

I'm going around in circles now!  Argh!

There are some documents regarding PSoC5 and sleep mode which, in short words, does not work as from the designers of the chip wanted.

Reducing power with calls to Component_Stop() will work, but there are Component_Sleep() and Component_Wakeup() which are prefered over the Stop() because it saves the current states.

I remember to have read that the only functioning sleep mode was using the CTW (Central Time Wheel) in a few ms slices. As I have heard the upcoming PSoC5 LP -version is working better regarding sleep mode.

To reduce power:

Set all pins as High-Z

Set all components to sleep

Save clock status

Enter desired low-power mode

Bob

 Go through this App Note on Low power modes and follow the steps mentioned in it to reduce the power consumption - http://www.cypress.com/?rID=64554

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Kishore.