For those of you interested in PSoC5 designs I though I'd post an image of my PSoC 5 implementation.

This system forms the heart of a large multi room audio system (a 4 x 4 audio matrix with DAB radio and an iPod dock).

The PSoC implements 4 UARTS, has 5 I2C devices attached, can learn any IR Remote control signal, and can output to any of 4 IR Transmitters. It drives 2 relays and 4 class D amplifier chips. It has 5 LED indicators and a USB port for bootloading new firmware. The PSoC also connects to another processor (PIC) for ethernet control. 

The PSoC is built directly into the main board, not attached by means of any dev kit. 

The image of my design is attached. I cannot post the entire project for obvious reasons but I'm happy to answer questions about it, and of course face criticism of it!! 

 I guess you have a reason for bit banging the I2C to TDA.  Is it because you ran out of PSoC resources, or is it because the TDA requires slightly abnormal I2C timing?  If the reason is the latter, consider a solution like I used recently for abnormal SPI timing.  The chip select line for a particular chip had additional meaning overloaded on the line, based on the length of time the line was active.  After forum user "hli" suggested it, I used a regular SPI component, but fed the the ss (slave select) into a PWM configured as retriggerable one-shot, before that signal exited the PSoC.  Thus, I was able to change the exact timing of the chip select line, both for initial active edge and active duration (aka final active edge).  The lesson learned here is that you can do any number of manipulations to a signal line coming from one component before you send it out of the PSoC.  Just think big!

 HI Helmut

Thanks for your comments. 

As for why the I2C for the TDA chips is bit banged...

It has to go to 4 identical TDA chips, all with the same address and no chip-select lines. I tried multiplexing the SCL line to 4 pins on the PSOC but there's no way to do this on-chip since it is a bidrectional signal. I don't use clock stretching and do not need to check for it, but the I2C component won't let you multiplex its SCL or SDA lines - so I just take them off-chip and through a quad AND gate - this was early in the design when I was using an I2C component, and it got into the hardware, and then I changed to bit-banging the I2C, at which stage I could have gone to on-chip multiplexing - but the boards were comitted to the board house. I could go back in a future revision, but that would break backwards compatibility with the firmware.

Why offload the ethernet task? Get a cheap ENC28J60 board and feel free to port my code,originally written for the PSoC3. I have done everything except add DHCP support. Check out that code here https://github.com/kmmankad/ENC28J60-PSoC3

 Thanks - I will take a look at that. 

There are a lot of other vendors with E projects, many relatively easily ported.

Atmel, PIC, Freescale. Port them to a part with ANALOG FROSTING and all is

good.

Regards, Dana.