I'm trying to drive the SPI lines for a STP1612PW05 chip.  

My new board has the STP1612PW05 pins SDI, SDO, CLK, and LE connected to the PSoC5 pins for SPI_Master_v2_20 pins mosi, miso, sclk, and ss, respectively.

The STP1612PW05 datasheet at http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/CD00237442.pdf 
describes on pages 13-15 a method of using the duration of LE high to identify the [type of] command being set over the data line.  I've never seen this done before and I'm not sure how to comply with this using the SPI_Master component.

Any and all help is greatly appreciated.

Here's how I perceive the situation, which could be right or wrong!  STP1612PW05 datasheet page 15 figure 6 shows how LE is high for 0 to 1 rising clock edge when one wants to perform the "Data Latch" command, but is high for 2 to 3 rising clock edges when one wants to perform the "Global Latch" command.  

I see no ability to do this in the SPI_Master.  Rather than connecting STP1612PW05 LE pin from SPI_Master ss pin, I think I need to drive STP1612PW05 LE pin explicitly myself.  Then, I'm wondering how do I then control both the width of the high LE pulse as well as the relative timing of it to the data coming out of the SPI_Master.  I'm sure hoping I won't have to totally hand code all the SPI stuff!  Furthermore, looking at the rest of figure 6, I'm not at all certain what the relative timing between LE and the data is supposed to be in general.

ARGH!

What comes to my mind is using a PWM for driving the LE signal. Configure the PWM to be "one shot with single trigger", and configure the trigger for falling edge. Then you can treigger the PWM with the SS signal from the SPIMaster component. Then you can, before you send out data, configure the PWM to exactly create the pulse you need (the best might be to use two outputs, and combine them with a XOR. That way you can exactly control when LE goes high, and when it goes low).

 genius.  thx.  I'll try it when my brain is working better than it is right now.  Jet lag remnants.

Please see http://www.cypress.com/?app=forum&id=2233&rID=64739

 hli, your technique is now working and I have just now successfully read the STP1612PW05 chip configuration registers, this being the most difficult (oddly formed timing) of the various commands.  Thanks!

Congratulations. I like when shooting out in the blue hits the target :)

But nonetheless I'm happy that you could use my idea. I think this again show the flexibilty of the PSoC (I don't think that it would work as easily with other MCUs - you either need to do bit-banging, or do some interrupt-driven stuff and hope the timing is right).