Hi,

 I want to run SAR ADC at lower sampling ratio, let say 300 SPS, which is not allowed in the design. I read that there is a way around this using external clock for the SAR. I put a clock at 5400 Hz, and rebuild the project. It automatically put the SPS ratio to 300 and gets the clock of 5.40054 kHz. But there is a flashing red exclamation mark in the field with the clock in the component window. It says that accepts between 1MHz and 18MHz clock frequency only (the thing that I want to go around), but with that frequency I cannot get a low SPS. And I need 2 SARs to work in parallel getting signals from 2 different analog inputs. Nevertheless the project could be build without errors. So, is that an issue, or I should not pay attention to it. If this is a problem, why compiler (clean and rebuild option) does not catch it, and if it is not an issue, why do I have the error?

Thank you!

Stoyan

Don't use the ADC in continous mode, just do a AD conversion every 3.3mS

Hi Stoyan,

Is there any specific reason why you want to sample at 300 SPS?

Are you using interrupt after every conversion to read the ADC data? If so, you can sample it at any higher permissible rate and give a 300Hz clock to "soc" terminal of the component. For this, the "Sample Mode" should be set to "Triggered".

Connecting an external clock of 5.4kHz to the ADC component might not be a good idea.

Hi all,

I can still put a timer and trigger an interrupt every 10 ms and get the result from the ADC. I am not sure how "correct" this approach would be.

Another approach would be to use a variable (double or long int) and sum the output of the ADC at 55k SPS. Then every 10 ms to get the result and divide it to 550 or so, and thus getting an average of this samples. this average would be my input for the FIFO buffer.

Either approach will take some processing and developing time, I usually prefer simplistic approach.

Could you please advise on this! Any help would be greatly appreciable.

Thanks!

Stoyan

You can use a fast ADC for slow sampling. Your ADC just finished faster.
Here is a simple c program to do this.
Note: You should consider what to do before the first 100 samples were
read. But that's is another problem.

void timer_interrupt (void)
{
 // interrupt every 3.3ms */
 /* all ADC are triggered mode */
 read ADC1;
 save reading to ADC1_data[counter];
 start ADC1 conversion;

 read ADC2;
 save reading to ADC2_data[counter];
 start ADC2 conversion;
 
 read ADC3;
 save reading to ADC3_data[counter];
 start ADC3 conversion;

 if (++currentCounter == 100)
 {
  currentCounter = 0;
 }

}

/* global variable */
uint8 currentCounter = 0;

void main(void)
{
 uint8 oldCounter = 0;

 /* init routine */
 
 while (1)
 {
 ....
  
  if (oldCounter != currentCounter)
  {
   oldCounter = currentCounter;
   
   /* do the averaging here */
   averageADCreadings();
  }
 .... 
  
 }
}
 

It is saver to do the following with the current counter

if (++currentCounter >= 100)
 {
  currentCounter = 0;
 }

I also have the same problem.I really want to use low SPS,but in Free Running Mode it seems can't realize.

In free-running mode, that will not work as you expect. Use the triggered mode an set up a PWM or timer to trigger your ADC with the right frequency. When done, use the EOC with an interrupt to get woken up to retrieve the converted value or use a DMA to store them wherever you like, because at low conversion frequencies you'll waste all your MIPS when you poll for the result ready.

Bob

Muxing is the way to go. Primary concern with a mux is when channel is changed to allow mux

output to settle. This is because of mux Ron x Cstray and Cgd and Cgs charge injection into output

of mux from gate switch signal.

Also use of one SAR conserves Pdiss, code space, and resources for other uses.

Here is a generalized ap note on switches and muxes - http://www.maxim-ic.com/app-notes/index.mvp/id/638

Regards, Dana.