Hello,

I´m dealing with the Problem how to meassure the time between two rising Edges of a PWM-Signal with the Frequency of 250 Hz.

Anybody who knows a sollution, because the cypress sollutions are without source code and I can´t reproduce their way of solving the Problem...

Hello,

of course I have to meassure the time between a rising and a falling Edge!

Hi Sebastian,

You can measure the Duty cycle of your external PWM signal by using 'Capture' input in the 'Counter' component.

1) Use 2 Counter components, Counter1 and Counter2

2) Configure Counter1's Capture Mode to 'Rising Edge' and Counter2's Capture Mode to 'Falling Edge'.

3) Connect the same external signal whose PWM is to be measured to both the 'Capture' inputs of the Counter Components.

4) A common clock (internal) of suitable frequency is connected to Counters' Count input.

5) Check the Interrupt 'On TC' box for both the components and connect the interrupt Components to the Interrupt Terminal of the Counters.

6) Also check Reload Counter 'On Capture'.

7) Now whenever there is an Interrupt on Rising Edge (in Counter1), Reload the Counter2 to 0 (assuming both the counters are in Up-Counters mode) in the ISR.

8) Whenever there is a Falling Edge (in Counter2), read the value. This value corresponds to the HIGH period of the given External Signal.

9) The total time period of the given external signal is the period between two Rising Edges (in Counter1).

10) The ratio of the values got in Step 8 and Step 9 gives the Duty Cycle of the PWM Signal.

Higher the Frequency of the clock used, better is the resolution of the value obtained.

Please let us know if this helps.

Regards,

dasg

Hello,

Thank you for the Tips! I had allready found another sullution, but it´s always good to know several ways!

I tried it and it works as fine as my sollution!

I have tried your method of measureing pulse width, but being very new to Creator (this is my second project) I am stumbling on this project.  Do you have a project built for this?  If so could you forward it to me?

Thank you,

Mike Allen

AS&E

My best experiences when measuring pulse-width was

Using an up-counter (UDB) with appropiate width. Set period to max, do not care for compare.

Provide the count - input with a stable cloc, connect the clock-input with busclock, connect capture (rising edge) with your signal to measure. Set reload counter at Reset, TC and Capture.

Poll counter state in a loop. When capture has happened read the valid captured value, when overflow or TC has happened the measure is invalid, no signal.

Bob