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Missing SPI Bit

Summary: 7098 Views, 1 Replies, Latest reply by Bob Goatse on 07 Dec 2010 11:45 AM PST

Verified Answers: 0

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RodneyE posted on 02 Dec 2010 2:52 PM PST
Member
6 Forum Posts

Hi All,

I am currently trying to interface a Texas Instruments ADS8328 16-bit A/D chip to my CY8KIT-001 (running a PSoC5 processor module), and am having trouble with the SPI communications between the two.

The PSoC5 uses a 16-bit SPIM component operating in mode 2 at 12Mhz, with MISO + MOSI, and MSB first. I am able to write initial configuration data from the PSoC5 (master) to the ADS8328 (slave) without a problem. However, when I try to read the configuration word back, the PSoC5 consistently fails to clock in the last bit.

So for example, lets say I send the initial configuration word "0xE6FD" to the ADS8328. In order to read that configuration word back out, I then send the word "0xC000" to the ADS8328, and look to see what arrives in the FIFO read buffer. I have included the function I call to perform this below:

 void ADS8328_Initialise(int8* ErrorCode)

{

    SPIM_1_Start();

    

    uint16 RegisterRead = 0;                        // Used for read/write

                                                    //  error checking.

    uint16 RegisterWrite = 0xE6FD;                  // Manual channel select,

                                                    //  tag bit disabled.

    SPIM_1_WriteTxData(RegisterWrite);              // Write CMR/CFR data.

    

    while ((SPIM_1_ReadTxStatus() & SPIM_1_STS_SPI_DONE) != SPIM_1_STS_SPI_DONE)

    {

        // Wait for CMR/CFR data to be written.

    }

    

    if (DEBUG)

    {

        RegisterWrite = 0xC000;                     // Read CFR data.

        SPIM_1_ClearFIFO();                         // Clear FIFO buffers.

        

        SPIM_1_WriteTxData(RegisterWrite);          // Write CMR data.

        

        while ((SPIM_1_ReadTxStatus() & SPIM_1_STS_SPI_DONE) != SPIM_1_STS_SPI_DONE)

        {

            // Wait for CMR data to be written.

        }

        

        while (SPIM_1_GetRxBufferSize() == 0)

        {

            // Wait for CFR data to arrive in buffer.

        }

        

        RegisterRead = SPIM_1_ReadRxData();         // Read buffered CFR data.

                

        RegisterRead &= 0x0FFF;                     // Mask CMF data.

        RegisterWrite = 0x06FD;

        

        if ((RegisterRead - RegisterWrite) != 0)

        {

            *ErrorCode = -1;

        }

    }

}

I have also attached an oscilloscope capture of the DEBUG code below. In it you can see "0xC000" being written to the ADS8328, and it clocking-out the initial configuration word, "0xE6FD", in response. Now, when I look at the content of RegisterRead before it is masked, I find "0x037E", which is correct, except that the LSB is missing. I have tried checking the FIFO buffer to see if the last bit was left there "by accident", with no joy. Is anyone able to shed some light on this situation, as I must admit that it has me stumped!

 

Regards

 

 - R


TEK0001.JPG


 

Bob Goatse posted on 07 Dec 2010 11:45 AM PST
Member
3 Forum Posts

The SPI Master component does not work properly. I spent a _whole lot of time_ debugging this with an oscilloscope, and finally made my own SPI master with Verilog. However, that component could not write into a Control Register! I will try DMA next. Anyway, I suggest that you try older versions of the SPIM. At least I was able to get some functionality out of v1.20.

 

Below are some bugs I have discovered:

SPI Master v2.0

1) The reset-input has no functionality
- I/O-reset is not possible, control register reset is not possible:
Error: mpr.M0093: The datapath, \SPIM:sR16:Dp:u0\, is using the routed reset feature which is not available in this revision of the device. (App=cydsfit)
- The prototyping platform (001) reset button will reset the SPI Master but also render all control registers unwriteable.

2) The UI setting for the internal clock does nothing, the SPI output clock is always 12MHz. This problem can be bypassed by writing directly to the clock divide register with SPIM_IntClock_SetDivider(). However, only a few divider values are accepted.

3) The component writes some garbage to the bus (a single 1-bit if I remember correctly) before the first actual word gets transferred. The prototyping platform (001) reset button removes this malfunction, but also renders all control registers unwriteable.

4) Consecutive bus writes with no delay in between them do not work. This problem can in some cases be avoided by using a longer wordlength, i.e., writing two or more words on one bus cycle.


SPI Master v1.20

1) RX and TX buffer sizes larger than 4 do not work.



 

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