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ADC DelSig conversion rate setup
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ADC DelSig conversion rate setup

ch701builder posted on 30 Nov 2010 3:06 PM PST
Senior Member
12 Forum Posts

Question: When setting up the Conversion Rate on the DeltaSigma block, is that rate driven by interrupts? So if I sample at 100Ksps (10us), is the interrupt called every 10us to take a sample, or is the timming derived some place else? Where/which interrupt is called to perform the start-conversion?

Keith

 




Re: ADC DelSig conversion rate setup

Gautam Das posted on 27 Dec 2010 03:28 AM PST
Cypress Employee
742 Forum Posts
Hi Keith, The 'Conversion Rate' of an ADC is the measure of the number of converted (digital) values obtained from the ADC. The resolution and the conversion rate of Delta Sigma ADC are inversely proportional. The clock frequency of the ADC is chosen according to the Resolution and the Conversion rate chosen by the user. Its grayed out and user doesn't have any control over it. However, the minimum clock frequency of the ADC is 128KHz, thereby bringing about min and max Conversion rate for an ADC for given value of resolution. The Hardware SOC (Start of Conversion has to be chosen to control the conversion rate externally. A signal on EOC is obtained on End of every conversion. Interrupt routine can be executed upon getting triggered by this interrupt source. Regards, dasg




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