Cypress Perform

Home > Design Support > Cypress Developer CommunityTM > Cypress Forums > PSoC® 3 > ADC_DelSig Example project

Bookmark and Share
Cypress Developer CommunityTM
Forums | Videos | Blogs | Training | Rewards Program | Community Components



ADC_DelSig Example project
Moderator:
RKRM

Post Reply
Follow this topic



ADC_DelSig Example project

vgy posted on 28 Sep 2012 6:07 AM PST
Top Contributor
133 Forum Posts

 

hi to all

Can any body explain: In the example project for psoc 3 in creater 2.0 of ADC Differential configuration mode, why VDAC is connected to negative terminal of ADC, what is its purpose?

Regards

Rajendra




Re: ADC_DelSig Example project

danaaknight posted on 28 Sep 2012 11:03 AM PST
Top Contributor
1773 Forum Posts

Answered on www.psocdeveloper.com

 

Regards, Dana.



Re: ADC_DelSig Example project

hli posted on 28 Sep 2012 01:38 PM PST
Top Contributor
675 Forum Posts

Now you just need to link to the correct posting (a search for ADCDelSig on psocdeveloper yields nothing suitable).

Thanks,

hli



Re: ADC_DelSig Example project

PSoC Rocks posted on 13 Oct 2012 04:03 AM PST
Top Contributor
128 Forum Posts

 Hi Rajendra,

 

As you can see in ADC component configuration window, input range of ADC is Vin- - Vref to Vin+ + Vref. So if you bias your input time varying signal to a DC voltage >= Vref, then you will get the complete dynamic range of ADC. Otherwise, your input range will get shortened. That is why you can see the VDAC constant reference voltage to the -ve Input of ADC.

 

Regards,

Kishore.






ALL CONTENT AND MATERIALS ON THIS SITE ARE PROVIDED "AS IS". CYPRESS SEMICONDUCTOR AND ITS RESPECTIVE SUPPLIERS MAKE NO REPRESENTATIONS ABOUT THE SUITABILITY OF THESE MATERIALS FOR ANY PURPOSE AND DISCLAIM ALL WARRANTIES AND CONDITIONS WITH REGARD TO THESE MATERIALS, INCLUDING BUT NOT LIMITED TO, ALL IMPLIED WARRANTIES AND CONDITIONS OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL PROPERTY RIGHT. NO LICENSE, EITHER EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, IS GRANTED BY CYPRESS SEMICONDUCTOR. USE OF THE INFORMATION ON THIS SITE MAY REQUIRE A LICENSE FROM A THIRD PARTY, OR A LICENSE FROM CYPRESS SEMICONDUCTOR.

Content on this site may contain or be subject to specific guidelines or limitations on use. All postings and use of the content on this site are subject to the Terms and Conditions of the site; third parties using this content agree to abide by any limitations or guidelines and to comply with the Terms and Conditions of this site. Cypress Semiconductor and its suppliers reserve the right to make corrections, deletions, modifications, enhancements, improvements and other changes to the content and materials, its products, programs and services at any time or to move or discontinue any content, products, programs, or services without notice.

Spec No: None; Sunset Owner: GRAA; Secondary Owner: RAIK; Sunset Date: 01/01/20