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My implementation of the DDS was not in Verilog, I am handicapped until I learn Verilog. Something
I want to get done over next few months.
So I did it as a software/DMA driven solution using IDAC (faster setlling time) and PGA. For the
analog portion. I used counters to count complete waveforms, fed by clock to DMA, to implement
the N burst capability. Also counters to control delay between bursts. To give it a general capa-
bility. The Waveform table was filled at run time by simple equation result values, sine, half sine,
ramp, triangle, sinc(x)/x.......
The digital pulse generator portion similiar capabilities.
This is only a small fractional part of project, came together quickly, a few days roughly.
Unfortunately none of the PSOC family tools offer simulation in them.
DDS block diagram in this case simple, its just a DAC placed on design, table and DMA all done in
software.
There is a wavedac component done by Cypress EE, http://www.cypress.com/?rID=54728
I have a design done in PSOC 1 almost finished, but uses external Analog Devices DDS parts, I need
RF waveforms in the 60 Mhz area, and thats out of the question for any PSOC internal DDS solution,
Verilog or otherwise.
Regards, Dana.
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