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filter design psoc3

jesusantoniocard posted on 19 Sep 2010 7:20 PM PST
Member
6 Forum Posts

 have a good day.

could anyone help me please, i would like to design a low pass filter, but  i dont know how  should implement this in psoc creator,

the imput and output pins  i cant find.

 

thanks.

 




Re: filter design psoc3

anmd posted on 27 Sep 2010 03:33 AM PST
Cypress Employee
15 Forum Posts

Note that PsoC 3 has a digital filter. We move in data to the staging register(input) and read the output from the holding register(output) of Digital filter block(DFB) using CPU/DMA. Refer the following example project for details:

http://www.cypress.com/?rID=40169



calculate the efective value

GiGo posted on 28 Nov 2010 02:39 PM PST
Member
2 Forum Posts

 Hi to everyone! I would use some help about one assigment, and I'll be grateful if you could help me. The assigment is on two input signal, I need to calculate the  efective value and I need to let the signal who has bigger effective value on the gate. My solution on this problem is the following:

I squere and add every sample and I do that for some particular number of sample, in my case that number is 65535. After that the sum which is equal to the sum of the sgures I devide it with 65535, and then I find a root on that rusult. In that way I get the effective value. After that i compere the two effective value and I let to the gate the bigger one.
my code is:
 
#include <device.h>
#include <math.h>
double  result = 0;
double  konecen = 0;
double  konecen1 = 0;
int32 suma1=0;
int32 suma2=0;
double  result1 = 0;
int32 br1=0;
int32 br2=0;
void main()
{
ADC_DelSig_1_Start(); /* Initialize ADC */
    for(;;)
    {
        AMux_1_Start( ); /* Reset all channels */
AMux_1_Select(0); /* Connect channel 1 */
ADC_DelSig_1_StartConvert();
ADC_DelSig_1_IsEndConversion(ADC_DelSig_1_WAIT_FOR_RESULT);
ADC_DelSig_1_StopConvert();
suma1+=ADC_DelSig_1_GetResult16() * ADC_DelSig_1_GetResult16();
br1+=1;  
        if (br1==65535)
 
{
result = suma1/65535 ;
konecen = sqrt(result);
        }
AMux_1_Select(1); /* Connect channel 2 */
ADC_DelSig_1_StartConvert();
ADC_DelSig_1_IsEndConversion(ADC_DelSig_1_WAIT_FOR_RESULT);
suma2+=ADC_DelSig_1_GetResult16() * ADC_DelSig_1_GetResult16();
br2+=1;
if (br2==65535)
 
{
result1 = suma2/65535 ;
konecen1 = sqrt(result1);
        }
 if( br1==65535 && br2==65535)
 {
   br1=0;
br2=0;
suma1=0;
suma2=0;
      if(konecen > konecen1)
   { 
AMux_2_Start( );
AMux_2_Select(0);
}
       else
        {
   AMux_2_Select(1);
}
break;
}
  }
}
 
Do you think this will work? Has anyone have a sugestion how I can advance the code? Then how can I make a conversion from a binary record on finaly and finaly1 into decimal becouse I will need to show it on the screen so I need the easiest way to do that? That should look like this:        
 Input signal1 effective value=number    
 Input signal2 effective value=number   
 output=signal1 or signal 2 it depends how is bigger
 Is it better if I calculate the sum of the root with the interapt routine form adc?
 Do you have any other ideas about how I can solve this problem? Thanks to everybody !!
 
 


Re: filter design psoc3

petermfleming posted on 09 Mar 2011 01:16 PM PST
Member
2 Forum Posts

 Could anyone help me I have to design a low pass analogue filter?

Thanks.



Re: filter design psoc3

U2 posted on 10 Mar 2011 11:22 PM PST
Cypress Employee
589 Forum Posts

Hi Gigo,

Yes it is possible to implement the algorithm, the way you have explained. Please tell us a little more about the nature of the signals being compared.

  • At what rate are these signals coming in and what rate is it being sampled. What is the resolution of the ADC that you have set. 
  • Also, after the RMS value calculation, do you want the RMS value to be put out , or do you want the 65k samples accumulated to be put out. Please clarify on this
  • To display the values out, you can either use USB or UART. For USB you might have to create your own GUI. 
  • A simple of way displaying on the PC is to use UART and Hyperterminal. After all comparisons are made, you can put out the data on UART and view it on an Hyperterminal.

-Udayan



PSOC 3 filters design

ANTONIO posted on 15 Jul 2011 08:40 AM PST
Member
4 Forum Posts

Hello,

I'd like to implement three bandpass filters with the CY8CKIT-001 PSOC DEVELOPMENT Kit. I read some information about PSoc filters into the forum and I read the AN2099 application note too, but I'm still not sure that they can be implemented and how would can I do it.

The filter's characteristics are:

Filter1:  Fs=105Hz  Fi=45Hz   B=60Hz   Fr=68,7Hz  Q=1,14
Filter2:  Fs=145Hz  Fi=65Hz   B=80Hz   Fr=97Hz    Q=1,21
Filter3:  Fs=8Hz    Fi=0,5Hz  B=7,5Hz  Fr=2Hz     Q=0,26

If it is really possible to implement these kind of filters, what would be the best method, using DBF blocks, SC/CT o FIR filters?.

Best regards,

Antonio M.



Re: filter design psoc3

U2 posted on 18 Jul 2011 02:46 AM PST
Cypress Employee
589 Forum Posts

In PSoC3, filters can be implemented using the DFB component that is available with PSoC Creator. Please see the following thread, http://www.cypress.com/?app=forum&id=2232&rID=41747. It is not possible to implement these filters in SC/CT blocks, like in the case of PSoC1. 

 



Re: filter design psoc3

ANTONIO posted on 19 Jul 2011 01:37 AM PST
Member
4 Forum Posts

I'll see the thread.

Thank you.



Re: filter design psoc3

vgy posted on 20 Jul 2012 06:01 AM PST
Top Contributor
133 Forum Posts

 hi to all

can any body help me in Digital filtering for blood pressure monitor with psoc 3



Re: filter design psoc3

Bob Marlowe posted on 20 Jul 2012 07:34 AM PST
Top Contributor
1768 Forum Posts

What do you need?

 

Bob



Re: filter design psoc3

ImperfectSeven posted on 20 Jul 2012 07:36 AM PST
Top Contributor
77 Forum Posts

You may want to be more descriptive in what you need so that others can see what it is you need help with.

For example: What does the digital filter need to do? Have you already made one and it doesn't work, or are you looking for a place to start?

 



Re: filter design psoc3

danaaknight posted on 20 Jul 2012 11:10 AM PST
Top Contributor
1773 Forum Posts

The choice to use an Analog or Switch Capacitor or Digital has a number of design

characteristics from each.

 

Simplest filters are 2 pole single stage MFB filters, Sallen Key for low sensitivity. Also exhibit

low noise. Dependent on external RC components. Not tunable easily.

 

SCT, SCF filters are good for minimizing externals, but a little more noisy. A little more

capability to tune. But not continuous as caps and ratio of capacitors finite.

 

Digital, you have finite length word effects from A/D thru MAC to D/A. Much more accurate

if the word length supports it.

 

There are many good texts on this topic with technology comparisons.

 

Regards, Dana.



Re: filter design psoc3

vgy posted on 21 Jul 2012 10:06 PM PST
Top Contributor
133 Forum Posts

my thanks for replying to question and to be more in to question is an FIR Band Pass filter with DFB so that it passes 0.3 hz to 10 hz  signal for measuring blood pressure 



Re: filter design psoc3

danaaknight posted on 21 Jul 2012 03:28 AM PST
Top Contributor
1773 Forum Posts

First you have to decide what filter response you want, passband ripple, and

stopband performance you are seeking, eg. how much out of passband rejection

you want. Generally this is a direct result of filter order and finite machine length

word size and taps.

 

Here is a cascade of Hilbert and LP to effect a basic BP to your partial specs.

Using Blackman window, each 64 taps.

 

Regards, Dana.



Re: filter design psoc3

danaaknight posted on 21 Jul 2012 03:39 AM PST
Top Contributor
1773 Forum Posts

If you want more exacting approximations try these design programs,

and transform to digital -

 

http://www.aade.com/

 

http://www1.icsi.berkeley.edu/~storn/fiwiz.html

 

Regards, Dana.






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