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The register of FIFOPINPOLAR in slave FIFO mean?
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The register of FIFOPINPOLAR in slave FIFO mean?

xiaoliuliu posted on 09 May 2013 1:40 AM PST
Top Contributor
25 Forum Posts

 I configure my 68013A into slave FIFO, and I configure FIFOPINPOLAR=0x00. Endpoint2 is out.

EP2CFG = 0xA2;                // BUF[1:0]=10 for 2x buffering

PINFLAGSCD = 0x08; // FLAGC - EP2EF, FLAGD - indexed

I know that FLAGC represents whether the End2 is empty.In my configuration ,if the endbuffer2 is empty ,the FLAGC PIN is low? If the endbuffer2 has some data , the FLAGC pin is high.




Re: The register of FIFOPINPOLAR in slave FIFO mean?

PRJI posted on 09 May 2013 03:10 AM PST
Cypress Employee
333 Forum Posts

Hi,

 Yes, you are right. The polarity of the ‘empty’ and ‘full’ flag pins defaults to active-low but may be inverted via the FIFOPINPOLAR register.

-PRJI






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