hi,everyone.
I have a question want to solve,I use the CY7C68013A-100 to transfer data from the FPGA to host. The CY7C68013A works in the SlaveFIFO auto in and auto out mode,the datawide is 8 bits. But when I download the .hex file to the hardware,the CY7C68013cannot bulk out transfer,can sonmeone give me some help,thaks a lot.
CPUCS = 0x10; // CLKSPD[1:0]=10, for 48MHz operation, output CLKOUT
IFCONFIG = 0x03; //
SYNCDELAY; // see TRM section 15.14
EP2CFG = 0xA2; // BUF[1:0]=10 for 2x buffering
//EP6 512 BULK IN 2x
SYNCDELAY; //
EP6CFG = 0xE2; // BUF[1:0]=10 for 2x buffering
// EP4 and EP8 are not used in this implementation...
SYNCDELAY; //
EP4CFG = 0x20; // clear valid bit
SYNCDELAY; //
EP8CFG = 0x60;
SYNCDELAY;
FIFORESET = 0x80; // activate NAK-ALL to avoid race conditions
SYNCDELAY; // see TRM section 15.14
FIFORESET = 0x02; // reset, FIFO 2
SYNCDELAY; //
FIFORESET = 0x04; // reset, FIFO 4
SYNCDELAY; //
FIFORESET = 0x06; // reset, FIFO 6
SYNCDELAY; //
FIFORESET = 0x08; // reset, FIFO 8
SYNCDELAY; //
FIFORESET = 0x00; // deactivate NAK-ALL
// handle the case where we were already in AUTO mode...
// ...for example: back to back firmware downloads...
SYNCDELAY; //
EP2FIFOCFG = 0x00; // AUTOOUT=0, 8 bit data bus
SYNCDELAY; //
EP2FIFOCFG = 0x10; // AUTOOUT=1, 8 bit data bus
SYNCDELAY; //
EP6FIFOCFG = 0x0C; // AUTOIN=1, ZEROLENIN=1, WORDWIDE=1
SYNCDELAY;
PINFLAGSAB = 0xE0; // FLAGA - indexed, FLAGB - EP6FF
SYNCDELAY;
PINFLAGSCD = 0x08; // FLAGC - EP2EF, FLAGD - indexed
SYNCDELAY;
|