Cypress Perform

Home > Design Support > Cypress Developer CommunityTM > Cypress Forums > USB Controllers > Where can I find GPIF project design file for Sync SlaveFIFO example code?

Bookmark and Share
Cypress Developer CommunityTM
Forums | Videos | Blogs | Training | Rewards Program | Community Components



Where can I find GPIF project design file for Sync SlaveFIFO example code?
Moderator:
RSKV

Post Reply
Follow this topic



Where can I find GPIF project design file for Sync SlaveFIFO example code?

ramuuu posted on 22 Nov 2012 6:22 AM PST
Senior Member
12 Forum Posts

Iam working on a project wherein an FPGA send streaming data to FX3 via GPIF. We are using syncSlaveFIFO example code as it is to fetch the data and dump onto a Windows PC with Streamer app on it to validate the data. But the socket0 buffer donot get any data. We want to check the GPIF design of this interface but couldn't find the source. WHere can I find GPIF project design file for Sync SlaveFIFO example code? We are using SDK 1.2 version.

Expecting early reply...

Thanks

Sriraam




Re: Where can I find GPIF project design file for Sync SlaveFIFO example code?

Lumpi6 posted on 22 Nov 2012 06:42 AM PST
Top Contributor
183 Forum Posts

Hi Sirriram,


download the AN65974.zip file from cypress...


here you get documentation and source code...


http://www.cypress.com/?rID=51581


and here just the zip file with source code


http://www.cypress.com/?docID=39756


regards
lumpi



Re: Where can I find GPIF project design file for Sync SlaveFIFO example code?

ramuuu posted on 29 Nov 2012 03:07 AM PST
Senior Member
12 Forum Posts

Thank you Lumpi6. Using the docs you specified we were able to find the throughput rate of FX3 in WIn7.

But we got only 280 MBps. We want to try in ubuntu Linux 12.10 and see if we can get more speed. So, we installed the FX3 SDK for linux.

But, we are unable to find any Streamer app for Linux there. What app should we use to find data throughput in Linux?

 



Re: Where can I find GPIF project design file for Sync SlaveFIFO example code?

Lumpi6 posted on 29 Nov 2012 03:35 AM PST
Top Contributor
183 Forum Posts

Hi Sriraam,

you welcome. The throughput sounds good are you using a PCIx card USB3 controller card or do you have a onboard USB3 with intel's ivy bridge? On an ivy bridge I got almost 400MB/s with the streamer app when configuring burst 14 or 16 and use 64 packets per xfer and 64 packets to queue.

You may open a new topic to get info if there is a streamer app for linux available. I have not found anything for now...

regards,

lumpi



Re: Where can I find GPIF project design file for Sync SlaveFIFO example code?

RSKV posted on 02 Dec 2012 09:55 PM PST
Cypress Employee
655 Forum Posts

Hi Sriram/Lumpi

You can use the same cyusb_linux tool for measuring the throughput over Bulk/ISO endpoints.

cyusb_linux tool supports all the functionalities supported by control center, bulkloop, streamer applications on windows.

For more details, please refer to the attached pdf.

Thanks,

sai krishna.



Re: Where can I find GPIF project design file for Sync SlaveFIFO example code?

ramuuu posted on 03 Dec 2012 05:30 AM PST
Senior Member
12 Forum Posts

Hi Lumpi6,

We are using a Dell Vostro Win7 laptop which has 2 USB 3.0 ports. After checking the device manager, I understand that it uses Renesas PCIe 1.1 to USB 3.0 controller card inside. not a intel ivy bridge. Also, surprisingly, when we checked with the C++ Streamer app ( a standalone .exe) we are getting 320MBps in WIn7 itself. But, what is more surprising is, with theoritical speed of PCIe 1.1 as only 250 MBps, how did we get 320 MBps. And, if my understanding is wrong, and if it is PCIe 2.0  card (with theoritical speed of 500MBps), then we should be able to get atleast 380 MBps. We are confused now! If you have any idea on this, please throw some light on us.  Thanks.

Hi Sai Krishna,

We had checked with the cyusb_linux tool and found that data transfer rate can be checked only for isochronous endpoints and not for Bulk endpoints (which we are using). Please advise us further steps on what should we do.

Thanks,

Sriraam



Re: Where can I find GPIF project design file for Sync SlaveFIFO example code?

Lumpi6 posted on 03 Dec 2012 06:55 AM PST
Top Contributor
183 Forum Posts

Hi Sriraam,

both solutions with PCIe 1.1 (using two lanes) or with PCIe 2.0 you be able to transfer 500Mbps so that depend on the internal connection of the renesas chip set. If you have a USB3.0 analyser you may double check if the throughput of the streamer app is correct. In my experience and measures it was all the time almost the same values mesured by streamer app or usb3 analyser. So what you see should be correct.

The reason why it is not more than 320Mbps is, I believe, that the renesas chip has this max bandwidth of the ~300Mbps. Only I got faster transfers with onbaord ivy bridge pc all other USB3 chip were up to now way slower. I think the renesas chip is one of generation 2 or 3. May be you tell me your used driver and firmware version? The newest of renesas generation 2 and 3 driver version is actually 3.0.23.0 and the firmware version is 2018 (you can see it in the windows device manager if you open the properties page of the renesas usb. The generation 1 has a driver like 2.x.xx.x.

regards

lumpi



Re: Where can I find GPIF project design file for Sync SlaveFIFO example code?

Lumpi6 posted on 03 Dec 2012 06:55 AM PST
Top Contributor
183 Forum Posts

Hi Sriraam,

both solutions with PCIe 1.1 (using two lanes) or with PCIe 2.0 you be able to transfer 500Mbps so that depend on the internal connection of the renesas chip set. If you have a USB3.0 analyser you may double check if the throughput of the streamer app is correct. In my experience and measures it was all the time almost the same values mesured by streamer app or usb3 analyser. So what you see should be correct.

The reason why it is not more than 320Mbps is, I believe, that the renesas chip has this max bandwidth of the ~300Mbps. Only I got faster transfers with onbaord ivy bridge pc all other USB3 chip were up to now way slower. I think the renesas chip is one of generation 2 or 3. May be you tell me your used driver and firmware version? The newest of renesas generation 2 and 3 driver version is actually 3.0.23.0 and the firmware version is 2018 (you can see it in the windows device manager if you open the properties page of the renesas usb. The generation 1 has a driver like 2.x.xx.x.

regards

lumpi



Re: Where can I find GPIF project design file for Sync SlaveFIFO example code?

ramuuu posted on 04 Dec 2012 11:57 PM PST
Senior Member
12 Forum Posts

Hi Lumpi,

I think your reasoning might be correct. My renesas USB3.0 chip driver version is 2.0.32.0 and firmware version is 1343. So, it seems that it is of older Gen 1 chip. Thanks for the gyaan, Lumpi.

By the way, do you use C# Streamer app (or) C++ Streamer app?

 



Re: Where can I find GPIF project design file for Sync SlaveFIFO example code?

Lumpi6 posted on 04 Dec 2012 12:18 AM PST
Top Contributor
183 Forum Posts

Hi Sriraam,

you're welcome..

I am using the c# streamer app of the installer from cypress CyUSBSuite version 1.2.1.0.

The actual drivers of the generation 1 chip (chip name/type 720200 and 720200A) is 2.1.39.0 and the firmware version is 3034 of 720200 and 4020 of 720200A). You may get it from.

http://www.station-drivers.com/page/renesas.htm

regards,

lumpi



Re: Where can I find GPIF project design file for Sync SlaveFIFO example code?

ramuuu posted on 14 Dec 2012 04:07 AM PST
Senior Member
12 Forum Posts

Hi Lumpi,

Thanks for the  info. But, when i tried installing the latest driver you specified, my Renesas USB3 controller is not accepting it and is saying that the best driver is already installed. I think the controller may be an older chip of the Gen1 controllers.

Anyway thanks for all the help.

Rgds,

Sriraam



Re: Where can I find GPIF project design file for Sync SlaveFIFO example code?

ramuuu posted on 14 Dec 2012 04:14 AM PST
Senior Member
12 Forum Posts

Hi Sai Krishna,

We had checked with the cyusb_linux tool and found that data transfer rate can be checked only for isochronous endpoints and not for Bulk endpoints (which we are using). Kindly clarify.

 

Also we find that the C# Streamer app is giving us lesser throughput while the C++ Streamer app is far better for the same exact setup and hardware. Why so much difference between them?

Expecting your reply for Both the questions...

Thanks,

Sriraam

 



Re: Where can I find GPIF project design file for Sync SlaveFIFO example code?

RSKV posted on 17 Dec 2012 10:22 PM PST
Cypress Employee
655 Forum Posts

Unfortunately, cyusb_linux tool supports throughput measurement only for ISO transfers.

Coming to your second question:

C# is managed code , it does not produce the Native code while build; while running the CLR will produce the native code then execute it. 

C++ Streamer is native code, so it will execute very fast. No CLR involvement.

Please refer to the following page if you need more details regarding CLR:

http://en.wikipedia.org/wiki/Common_Language_Runtime

Regards,

sai krishna.

 



Re: Where can I find GPIF project design file for Sync SlaveFIFO example code?

ramuuu posted on 19 Dec 2012 04:59 AM PST
Senior Member
12 Forum Posts

Thanks Sai krishna for the info about C#/C++ Streamer.

Also, can we expect a cyusb_linux tool update which supports data throughput in Bulk transfers anytime soon?

Thanks,

Sriraam






ALL CONTENT AND MATERIALS ON THIS SITE ARE PROVIDED "AS IS". CYPRESS SEMICONDUCTOR AND ITS RESPECTIVE SUPPLIERS MAKE NO REPRESENTATIONS ABOUT THE SUITABILITY OF THESE MATERIALS FOR ANY PURPOSE AND DISCLAIM ALL WARRANTIES AND CONDITIONS WITH REGARD TO THESE MATERIALS, INCLUDING BUT NOT LIMITED TO, ALL IMPLIED WARRANTIES AND CONDITIONS OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL PROPERTY RIGHT. NO LICENSE, EITHER EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, IS GRANTED BY CYPRESS SEMICONDUCTOR. USE OF THE INFORMATION ON THIS SITE MAY REQUIRE A LICENSE FROM A THIRD PARTY, OR A LICENSE FROM CYPRESS SEMICONDUCTOR.

Content on this site may contain or be subject to specific guidelines or limitations on use. All postings and use of the content on this site are subject to the Terms and Conditions of the site; third parties using this content agree to abide by any limitations or guidelines and to comply with the Terms and Conditions of this site. Cypress Semiconductor and its suppliers reserve the right to make corrections, deletions, modifications, enhancements, improvements and other changes to the content and materials, its products, programs and services at any time or to move or discontinue any content, products, programs, or services without notice.