Hello,

can someone help me to find timing description for the GPIO interrupt configurations?

typedef enum CyU3PGpioIntrMode_t
{
    CY_U3P_GPIO_NO_INTR = 0,        /* No Interrupt is triggered*/
    CY_U3P_GPIO_INTR_POS_EDGE,      /* Interrupt is triggered for positive edge of input. */
    CY_U3P_GPIO_INTR_NEG_EDGE,      /* Interrupt is triggered for negative edge of input. */
    CY_U3P_GPIO_INTR_BOTH_EDGE,     /* Interrupt is triggered for both edge of input. */
    CY_U3P_GPIO_INTR_LOW_LEVEL,     /* Interrupt is triggered for Low level of input. */
    CY_U3P_GPIO_INTR_HIGH_LEVEL,    /* Interrupt is triggered for High level of input. */
    CY_U3P_GPIO_INTR_TIMER_THRES,   /* Interrupt is triggered when the timer crosses the
                                       threshold. Valid only for complex GPIO pin. */
    CY_U3P_GPIO_INTR_TIMER_ZERO     /* Interrupt is triggered when the timer reaches zero.
                                       Valid only for complex GPIO pin. */
} CyU3PGpioIntrMode_t;
 

How long has a signal to be, that a interrupt is executed in case of low-/, high-level?

How long does it take if I use positive edge till the edge is detected?

Thanks,

lumpi

Hi Lumpi,

The input signal has to be more than 100 ns for either positive or negative edge to be detected.

Please let me know if you observe anything different from this.

Thanks,

sai krishna.

Hi Sai Krishna,

thanks for your answer, that was everything I liked to know, awesome.

regards,

lumpi